Searched refs:H2_ISR_TSTATUS (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/sound/mips/
H A Dhal2.h28 #define H2_ISR_TSTATUS 0x01 /* RO: transaction status 1=busy */ macro
H A Dhal2.c99 #define H2_INDIRECT_WAIT(regs) while (hal2_read(&regs->isr) & H2_ISR_TSTATUS);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/sound/mips/
H A Dhal2.h28 #define H2_ISR_TSTATUS 0x01 /* RO: transaction status 1=busy */ macro
H A Dhal2.c99 #define H2_INDIRECT_WAIT(regs) while (hal2_read(&regs->isr) & H2_ISR_TSTATUS);

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