Searched refs:EPPI0_VDELAY (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A DdefBF544.h47 #define EPPI0_VDELAY 0xffc01010 /* EPPI0 Vertical Delay Count Register */ macro
H A DcdefBF544.h69 #define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY)
70 #define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELAY, val)
H A DcdefBF547.h116 #define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY)
117 #define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELAY, val)
H A DdefBF547.h72 #define EPPI0_VDELAY 0xffc01010 /* EPPI0 Vertical Delay Count Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF544.h47 #define EPPI0_VDELAY 0xffc01010 /* EPPI0 Vertical Delay Count Register */ macro
H A DcdefBF544.h69 #define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY)
70 #define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELAY, val)
H A DcdefBF547.h116 #define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY)
117 #define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELAY, val)
H A DdefBF547.h72 #define EPPI0_VDELAY 0xffc01010 /* EPPI0 Vertical Delay Count Register */ macro

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