Searched refs:EMAC_MMC_RIRQS (Results 1 - 12 of 12) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF516.h76 #define bfin_read_EMAC_MMC_RIRQS() bfin_read32(EMAC_MMC_RIRQS)
77 #define bfin_write_EMAC_MMC_RIRQS(val) bfin_write32(EMAC_MMC_RIRQS, val)
H A DdefBF516.h46 #define EMAC_MMC_RIRQS 0xFFC03084 /* MMC RX Interrupt Status Register */ macro
340 /* EMAC_MMC_RIRQS and EMAC_MMC_RIRQE Masks */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF527.h76 #define bfin_read_EMAC_MMC_RIRQS() bfin_read32(EMAC_MMC_RIRQS)
77 #define bfin_write_EMAC_MMC_RIRQS(val) bfin_write32(EMAC_MMC_RIRQS, val)
H A DdefBF527.h45 #define EMAC_MMC_RIRQS 0xFFC03084 /* MMC RX Interrupt Status Register */ macro
339 /* EMAC_MMC_RIRQS and EMAC_MMC_RIRQE Masks */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf537/include/mach/
H A DcdefBF537.h76 #define bfin_read_EMAC_MMC_RIRQS() bfin_read32(EMAC_MMC_RIRQS)
77 #define bfin_write_EMAC_MMC_RIRQS(val) bfin_write32(EMAC_MMC_RIRQS,val)
H A DdefBF537.h51 #define EMAC_MMC_RIRQS 0xFFC03084 /* MMC RX Interrupt Status Register */ macro
329 /* EMAC_MMC_RIRQS and EMAC_MMC_RIRQE Masks */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF516.h76 #define bfin_read_EMAC_MMC_RIRQS() bfin_read32(EMAC_MMC_RIRQS)
77 #define bfin_write_EMAC_MMC_RIRQS(val) bfin_write32(EMAC_MMC_RIRQS, val)
H A DdefBF516.h46 #define EMAC_MMC_RIRQS 0xFFC03084 /* MMC RX Interrupt Status Register */ macro
340 /* EMAC_MMC_RIRQS and EMAC_MMC_RIRQE Masks */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF527.h76 #define bfin_read_EMAC_MMC_RIRQS() bfin_read32(EMAC_MMC_RIRQS)
77 #define bfin_write_EMAC_MMC_RIRQS(val) bfin_write32(EMAC_MMC_RIRQS, val)
H A DdefBF527.h45 #define EMAC_MMC_RIRQS 0xFFC03084 /* MMC RX Interrupt Status Register */ macro
339 /* EMAC_MMC_RIRQS and EMAC_MMC_RIRQE Masks */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DcdefBF537.h76 #define bfin_read_EMAC_MMC_RIRQS() bfin_read32(EMAC_MMC_RIRQS)
77 #define bfin_write_EMAC_MMC_RIRQS(val) bfin_write32(EMAC_MMC_RIRQS,val)
H A DdefBF537.h51 #define EMAC_MMC_RIRQS 0xFFC03084 /* MMC RX Interrupt Status Register */ macro
329 /* EMAC_MMC_RIRQS and EMAC_MMC_RIRQE Masks */

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