Searched refs:EMAC_MMC_CTL (Results 1 - 12 of 12) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF516.h74 #define bfin_read_EMAC_MMC_CTL() bfin_read32(EMAC_MMC_CTL)
75 #define bfin_write_EMAC_MMC_CTL(val) bfin_write32(EMAC_MMC_CTL, val)
H A DdefBF516.h45 #define EMAC_MMC_CTL 0xFFC03080 /* MMC Counter Control Register */ macro
334 /* EMAC_MMC_CTL Masks */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF527.h74 #define bfin_read_EMAC_MMC_CTL() bfin_read32(EMAC_MMC_CTL)
75 #define bfin_write_EMAC_MMC_CTL(val) bfin_write32(EMAC_MMC_CTL, val)
H A DdefBF527.h44 #define EMAC_MMC_CTL 0xFFC03080 /* MMC Counter Control Register */ macro
333 /* EMAC_MMC_CTL Masks */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf537/include/mach/
H A DcdefBF537.h74 #define bfin_read_EMAC_MMC_CTL() bfin_read32(EMAC_MMC_CTL)
75 #define bfin_write_EMAC_MMC_CTL(val) bfin_write32(EMAC_MMC_CTL,val)
H A DdefBF537.h50 #define EMAC_MMC_CTL 0xFFC03080 /* MMC Counter Control Register */ macro
323 /* EMAC_MMC_CTL Masks */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF516.h74 #define bfin_read_EMAC_MMC_CTL() bfin_read32(EMAC_MMC_CTL)
75 #define bfin_write_EMAC_MMC_CTL(val) bfin_write32(EMAC_MMC_CTL, val)
H A DdefBF516.h45 #define EMAC_MMC_CTL 0xFFC03080 /* MMC Counter Control Register */ macro
334 /* EMAC_MMC_CTL Masks */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF527.h74 #define bfin_read_EMAC_MMC_CTL() bfin_read32(EMAC_MMC_CTL)
75 #define bfin_write_EMAC_MMC_CTL(val) bfin_write32(EMAC_MMC_CTL, val)
H A DdefBF527.h44 #define EMAC_MMC_CTL 0xFFC03080 /* MMC Counter Control Register */ macro
333 /* EMAC_MMC_CTL Masks */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DcdefBF537.h74 #define bfin_read_EMAC_MMC_CTL() bfin_read32(EMAC_MMC_CTL)
75 #define bfin_write_EMAC_MMC_CTL(val) bfin_write32(EMAC_MMC_CTL,val)
H A DdefBF537.h50 #define EMAC_MMC_CTL 0xFFC03080 /* MMC Counter Control Register */ macro
323 /* EMAC_MMC_CTL Masks */

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