Searched refs:EHCA_BMASK_SET (Results 1 - 10 of 10) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/infiniband/hw/ehca/
H A Dhipz_fns_core.h65 EHCA_BMASK_SET(QPX_SQADDER, nr_wqes));
72 EHCA_BMASK_SET(QPX_RQADDER, nr_wqes));
78 EHCA_BMASK_SET(CQX_FECADDER, nr_cqes));
86 EHCA_BMASK_SET(CQX_N0_GENERATE_SOLICITED_COMP_EVENT,
96 EHCA_BMASK_SET(CQX_N1_GENERATE_COMP_EVENT, value));
H A Dehca_av.c118 av->av.grh.word_0 = EHCA_BMASK_SET(GRH_IPVERSION_MASK, 6);
119 av->av.grh.word_0 |= EHCA_BMASK_SET(GRH_TCLASS_MASK,
121 av->av.grh.word_0 |= EHCA_BMASK_SET(GRH_FLOWLABEL_MASK,
123 av->av.grh.word_0 |= EHCA_BMASK_SET(GRH_HOPLIMIT_MASK,
125 av->av.grh.word_0 |= EHCA_BMASK_SET(GRH_NEXTHEADER_MASK, 0x1B);
180 new_ehca_av.lnh = EHCA_BMASK_SET(GRH_FLAG_MASK,
182 new_ehca_av.grh.word_0 = EHCA_BMASK_SET(GRH_TCLASS_MASK,
184 new_ehca_av.grh.word_0 |= EHCA_BMASK_SET(GRH_FLOWLABEL_MASK,
186 new_ehca_av.grh.word_0 |= EHCA_BMASK_SET(GRH_HOPLIMIT_MASK,
188 new_ehca_av.grh.word_0 |= EHCA_BMASK_SET(GRH_NEXTHEADER_MAS
[all...]
H A Dhcp_if.c314 EHCA_BMASK_SET(H_ALL_RES_QP_ENHANCED_OPS, parms->ext_type)
315 | EHCA_BMASK_SET(H_ALL_RES_QP_PTE_PIN, 0)
316 | EHCA_BMASK_SET(H_ALL_RES_QP_SERVICE_TYPE, parms->servicetype)
317 | EHCA_BMASK_SET(H_ALL_RES_QP_SIGNALING_TYPE, parms->sigtype)
318 | EHCA_BMASK_SET(H_ALL_RES_QP_STORAGE, parms->qp_storage)
319 | EHCA_BMASK_SET(H_ALL_RES_QP_SMALL_SQ_PAGE_SIZE,
321 | EHCA_BMASK_SET(H_ALL_RES_QP_SMALL_RQ_PAGE_SIZE,
323 | EHCA_BMASK_SET(H_ALL_RES_QP_LL_RQ_CQE_POSTING,
325 | EHCA_BMASK_SET(H_ALL_RES_QP_LL_SQ_CQE_POSTING,
327 | EHCA_BMASK_SET(H_ALL_RES_QP_UD_AV_LKEY_CTR
[all...]
H A Dehca_qp.c1010 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1024 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1038 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1344 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1385 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1424 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1432 EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1444 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1481 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1485 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKE
[all...]
H A Dehca_tools.h139 * EHCA_BMASK_SET - return value shifted and masked by mask
140 * variable|=EHCA_BMASK_SET(MY_MASK,0x4711) ORs the bits in variable
141 * variable&=~EHCA_BMASK_SET(MY_MASK,-1) clears the bits from the mask
144 #define EHCA_BMASK_SET(mask, value) \ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/infiniband/hw/ehca/
H A Dhipz_fns_core.h65 EHCA_BMASK_SET(QPX_SQADDER, nr_wqes));
72 EHCA_BMASK_SET(QPX_RQADDER, nr_wqes));
78 EHCA_BMASK_SET(CQX_FECADDER, nr_cqes));
86 EHCA_BMASK_SET(CQX_N0_GENERATE_SOLICITED_COMP_EVENT,
96 EHCA_BMASK_SET(CQX_N1_GENERATE_COMP_EVENT, value));
H A Dehca_av.c118 av->av.grh.word_0 = EHCA_BMASK_SET(GRH_IPVERSION_MASK, 6);
119 av->av.grh.word_0 |= EHCA_BMASK_SET(GRH_TCLASS_MASK,
121 av->av.grh.word_0 |= EHCA_BMASK_SET(GRH_FLOWLABEL_MASK,
123 av->av.grh.word_0 |= EHCA_BMASK_SET(GRH_HOPLIMIT_MASK,
125 av->av.grh.word_0 |= EHCA_BMASK_SET(GRH_NEXTHEADER_MASK, 0x1B);
180 new_ehca_av.lnh = EHCA_BMASK_SET(GRH_FLAG_MASK,
182 new_ehca_av.grh.word_0 = EHCA_BMASK_SET(GRH_TCLASS_MASK,
184 new_ehca_av.grh.word_0 |= EHCA_BMASK_SET(GRH_FLOWLABEL_MASK,
186 new_ehca_av.grh.word_0 |= EHCA_BMASK_SET(GRH_HOPLIMIT_MASK,
188 new_ehca_av.grh.word_0 |= EHCA_BMASK_SET(GRH_NEXTHEADER_MAS
[all...]
H A Dhcp_if.c314 EHCA_BMASK_SET(H_ALL_RES_QP_ENHANCED_OPS, parms->ext_type)
315 | EHCA_BMASK_SET(H_ALL_RES_QP_PTE_PIN, 0)
316 | EHCA_BMASK_SET(H_ALL_RES_QP_SERVICE_TYPE, parms->servicetype)
317 | EHCA_BMASK_SET(H_ALL_RES_QP_SIGNALING_TYPE, parms->sigtype)
318 | EHCA_BMASK_SET(H_ALL_RES_QP_STORAGE, parms->qp_storage)
319 | EHCA_BMASK_SET(H_ALL_RES_QP_SMALL_SQ_PAGE_SIZE,
321 | EHCA_BMASK_SET(H_ALL_RES_QP_SMALL_RQ_PAGE_SIZE,
323 | EHCA_BMASK_SET(H_ALL_RES_QP_LL_RQ_CQE_POSTING,
325 | EHCA_BMASK_SET(H_ALL_RES_QP_LL_SQ_CQE_POSTING,
327 | EHCA_BMASK_SET(H_ALL_RES_QP_UD_AV_LKEY_CTR
[all...]
H A Dehca_qp.c1010 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1024 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1038 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1344 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1385 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1424 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1432 EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1444 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1481 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1485 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKE
[all...]
H A Dehca_tools.h139 * EHCA_BMASK_SET - return value shifted and masked by mask
140 * variable|=EHCA_BMASK_SET(MY_MASK,0x4711) ORs the bits in variable
141 * variable&=~EHCA_BMASK_SET(MY_MASK,-1) clears the bits from the mask
144 #define EHCA_BMASK_SET(mask, value) \ macro

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