Searched refs:EBIU_DDRGC0 (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h192 #define EBIU_DDRGC0 0xffc00ab0 /* DDR Grant Count 0 Register */ macro
H A DcdefBF54x_base.h289 #define bfin_read_EBIU_DDRGC0() bfin_read32(EBIU_DDRGC0)
290 #define bfin_write_EBIU_DDRGC0(val) bfin_write32(EBIU_DDRGC0, val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h192 #define EBIU_DDRGC0 0xffc00ab0 /* DDR Grant Count 0 Register */ macro
H A DcdefBF54x_base.h289 #define bfin_read_EBIU_DDRGC0() bfin_read32(EBIU_DDRGC0)
290 #define bfin_write_EBIU_DDRGC0(val) bfin_write32(EBIU_DDRGC0, val)

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