Searched refs:D_CACHE_LINE_SIZE (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mm/
H A Dcache-v6.S21 #define D_CACHE_LINE_SIZE 32 define
169 add r0, r0, #D_CACHE_LINE_SIZE
194 tst r0, #D_CACHE_LINE_SIZE - 1
195 bic r0, r0, #D_CACHE_LINE_SIZE - 1
201 tst r1, #D_CACHE_LINE_SIZE - 1
206 bic r1, r1, #D_CACHE_LINE_SIZE - 1
218 add r0, r0, #D_CACHE_LINE_SIZE
235 bic r0, r0, #D_CACHE_LINE_SIZE - 1
245 add r0, r0, #D_CACHE_LINE_SIZE
262 bic r0, r0, #D_CACHE_LINE_SIZE
[all...]
H A Dproc-v6.S23 #define D_CACHE_LINE_SIZE 32 define
80 add r0, r0, #D_CACHE_LINE_SIZE
81 subs r1, r1, #D_CACHE_LINE_SIZE
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mm/
H A Dcache-v6.S21 #define D_CACHE_LINE_SIZE 32 define
169 add r0, r0, #D_CACHE_LINE_SIZE
194 tst r0, #D_CACHE_LINE_SIZE - 1
195 bic r0, r0, #D_CACHE_LINE_SIZE - 1
201 tst r1, #D_CACHE_LINE_SIZE - 1
206 bic r1, r1, #D_CACHE_LINE_SIZE - 1
218 add r0, r0, #D_CACHE_LINE_SIZE
235 bic r0, r0, #D_CACHE_LINE_SIZE - 1
245 add r0, r0, #D_CACHE_LINE_SIZE
262 bic r0, r0, #D_CACHE_LINE_SIZE
[all...]
H A Dproc-v6.S23 #define D_CACHE_LINE_SIZE 32 define
80 add r0, r0, #D_CACHE_LINE_SIZE
81 subs r1, r1, #D_CACHE_LINE_SIZE

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