Searched refs:DMA_COUNT (Results 1 - 10 of 10) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mach-rc32434/
H A Ddma_v.h21 #define DMA_COUNT(count) ((count) & DMA_DESC_COUNT_MSK) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-rc32434/
H A Ddma_v.h21 #define DMA_COUNT(count) ((count) & DMA_DESC_COUNT_MSK) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sparc/include/asm/
H A Ddma.h19 #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sparc/include/asm/
H A Ddma.h19 #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/
H A Dkorina.c242 td->control = DMA_COUNT(length) |
253 td->control = DMA_COUNT(length) |
272 td->control = DMA_COUNT(length) |
279 td->control = DMA_COUNT(length) |
368 if ((KORINA_RBSIZE - (u32)DMA_COUNT(rd->control)) == 0)
432 rd->control = DMA_COUNT(KORINA_RBSIZE) |
773 DMA_COUNT(KORINA_RBSIZE);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/
H A Dkorina.c242 td->control = DMA_COUNT(length) |
253 td->control = DMA_COUNT(length) |
272 td->control = DMA_COUNT(length) |
279 td->control = DMA_COUNT(length) |
368 if ((KORINA_RBSIZE - (u32)DMA_COUNT(rd->control)) == 0)
432 rd->control = DMA_COUNT(KORINA_RBSIZE) |
773 DMA_COUNT(KORINA_RBSIZE);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/scsi/
H A Dsun_esp.c443 dma_write32(dma_count, DMA_COUNT);
456 dma_write32(end - addr, DMA_COUNT);
H A Dsun3x_esp.c24 #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/scsi/
H A Dsun_esp.c443 dma_write32(dma_count, DMA_COUNT);
456 dma_write32(end - addr, DMA_COUNT);
H A Dsun3x_esp.c24 #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ macro

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