Searched refs:DMAC_REG (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-pxa/include/plat/
H A Ddma.h4 #define DMAC_REG(x) (*((volatile u32 *)(DMAC_REGS_VIRT + (x)))) macro
6 #define DCSR(n) DMAC_REG((n) << 2)
7 #define DALGN DMAC_REG(0x00a0) /* DMA Alignment Register */
8 #define DINT DMAC_REG(0x00f0) /* DMA Interrupt Register */
9 #define DDADR(n) DMAC_REG(0x0200 + ((n) << 4))
10 #define DSADR(n) DMAC_REG(0x0204 + ((n) << 4))
11 #define DTADR(n) DMAC_REG(0x0208 + ((n) << 4))
12 #define DCMD(n) DMAC_REG(0x020c + ((n) << 4))
13 #define DRCMR(n) DMAC_REG((((n) < 64) ? 0x0100 : 0x1100) + \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-pxa/include/plat/
H A Ddma.h4 #define DMAC_REG(x) (*((volatile u32 *)(DMAC_REGS_VIRT + (x)))) macro
6 #define DCSR(n) DMAC_REG((n) << 2)
7 #define DALGN DMAC_REG(0x00a0) /* DMA Alignment Register */
8 #define DINT DMAC_REG(0x00f0) /* DMA Interrupt Register */
9 #define DDADR(n) DMAC_REG(0x0200 + ((n) << 4))
10 #define DSADR(n) DMAC_REG(0x0204 + ((n) << 4))
11 #define DTADR(n) DMAC_REG(0x0208 + ((n) << 4))
12 #define DCMD(n) DMAC_REG(0x020c + ((n) << 4))
13 #define DRCMR(n) DMAC_REG((((n) < 64) ? 0x0100 : 0x1100) + \

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