Searched refs:DMA2_5_X_COUNT (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf561/include/mach/
H A DdefBF561.h622 #define DMA2_5_X_COUNT 0xFFC00D50 /* DMA2 Channel 5 Inner Loop Count */ macro
H A DcdefBF561.h1097 #define bfin_read_DMA2_5_X_COUNT() bfin_read16(DMA2_5_X_COUNT)
1098 #define bfin_write_DMA2_5_X_COUNT(val) bfin_write16(DMA2_5_X_COUNT,val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf561/include/mach/
H A DdefBF561.h622 #define DMA2_5_X_COUNT 0xFFC00D50 /* DMA2 Channel 5 Inner Loop Count */ macro
H A DcdefBF561.h1097 #define bfin_read_DMA2_5_X_COUNT() bfin_read16(DMA2_5_X_COUNT)
1098 #define bfin_write_DMA2_5_X_COUNT(val) bfin_write16(DMA2_5_X_COUNT,val)

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