Searched refs:DM0 (Results 1 - 10 of 10) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/opcodes/
H A Dm10200-opc.c39 #define DM0 (DN1+1)
43 #define DM1 (DM0+1)
168 { "mov", 0x80, 0xf0, FMT_1, {DN1, DM0}},
170 { "mov", 0xf2f0, 0xfff0, FMT_4, {AN1, DM0}},
176 { "mov", 0x20, 0xf0, FMT_1, {MEM(AN1), DM0}},
177 { "mov", 0x6000, 0xf000, FMT_2, {MEM2(SD8, AN1), DM0}},
178 { "mov", 0xf7c00000, 0xfff00000, FMT_6, {MEM2(SD16, AN1), DM0}},
179 { "mov", 0xf4800000, 0xfff00000, FMT_7, {MEM2(IMM24,AN1), DM0}},
180 { "mov", 0xf140, 0xffc0, FMT_4, {MEM2(DI, AN1), DM0}},
190 { "mov", 0x00, 0xf0, FMT_1, {DM0, ME
38 #define DM0 macro
[all...]
H A Dm10300-opc.c46 #define DM0 (DN2+1)
50 #define DM1 (DM0+1)
45 #define DM0 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/opcodes/
H A Dm10200-opc.c39 #define DM0 (DN1+1)
43 #define DM1 (DM0+1)
168 { "mov", 0x80, 0xf0, FMT_1, {DN1, DM0}},
170 { "mov", 0xf2f0, 0xfff0, FMT_4, {AN1, DM0}},
176 { "mov", 0x20, 0xf0, FMT_1, {MEM(AN1), DM0}},
177 { "mov", 0x6000, 0xf000, FMT_2, {MEM2(SD8, AN1), DM0}},
178 { "mov", 0xf7c00000, 0xfff00000, FMT_6, {MEM2(SD16, AN1), DM0}},
179 { "mov", 0xf4800000, 0xfff00000, FMT_7, {MEM2(IMM24,AN1), DM0}},
180 { "mov", 0xf140, 0xffc0, FMT_4, {MEM2(DI, AN1), DM0}},
190 { "mov", 0x00, 0xf0, FMT_1, {DM0, ME
38 #define DM0 macro
[all...]
H A Dm10300-opc.c46 #define DM0 (DN2+1)
50 #define DM1 (DM0+1)
45 #define DM0 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/opcodes/
H A Dm10200-opc.c39 #define DM0 (DN1+1)
43 #define DM1 (DM0+1)
168 { "mov", 0x80, 0xf0, FMT_1, {DN1, DM0}},
170 { "mov", 0xf2f0, 0xfff0, FMT_4, {AN1, DM0}},
176 { "mov", 0x20, 0xf0, FMT_1, {MEM(AN1), DM0}},
177 { "mov", 0x6000, 0xf000, FMT_2, {MEM2(SD8, AN1), DM0}},
178 { "mov", 0xf7c00000, 0xfff00000, FMT_6, {MEM2(SD16, AN1), DM0}},
179 { "mov", 0xf4800000, 0xfff00000, FMT_7, {MEM2(IMM24,AN1), DM0}},
180 { "mov", 0xf140, 0xffc0, FMT_4, {MEM2(DI, AN1), DM0}},
190 { "mov", 0x00, 0xf0, FMT_1, {DM0, ME
38 #define DM0 macro
[all...]
H A Dm10300-opc.c46 #define DM0 (DN2+1)
50 #define DM1 (DM0+1)
45 #define DM0 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/boards/mach-cayman/
H A Dsetup.c38 #define DM0 NO_PRIORITY /* DMA Ints */ macro
93 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/boards/mach-cayman/
H A Dsetup.c38 #define DM0 NO_PRIORITY /* DMA Ints */ macro
93 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mn10300/mm/
H A Dmisalignment.c102 DM0, /* data reg in opcode in bits 0-1 */ enumerator in enum:value_id
133 DN0 = DM0,
564 case DM0:
685 case DM0:
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mn10300/mm/
H A Dmisalignment.c102 DM0, /* data reg in opcode in bits 0-1 */ enumerator in enum:value_id
133 DN0 = DM0,
564 case DM0:
685 case DM0:

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