Searched refs:DGCS (Results 1 - 4 of 4) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/vme/bridges/ |
H A D | vme_ca91cx42.c | 103 val = ioread32(bridge->base + DGCS); 107 "Read Error DGCS=%08X\n", val); 120 val = ioread32(bridge->base + DGCS); 124 "Read Error DGCS=%08X\n", val); 1083 tmp = ioread32(bridge->base + DGCS); 1128 val = ioread32(bridge->base + DGCS); 1136 iowrite32(val, bridge->base + DGCS); 1140 iowrite32(val, bridge->base + DGCS); 1149 val = ioread32(bridge->base + DGCS); 1154 dev_err(dev, "ca91c042: DMA Error. DGCS [all...] |
H A D | vme_ca91cx42.h | 149 #define DGCS 0x0220 macro 396 * DMA General Control/Status Register (DGCS)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/vme/bridges/ |
H A D | vme_ca91cx42.c | 103 val = ioread32(bridge->base + DGCS); 107 "Read Error DGCS=%08X\n", val); 120 val = ioread32(bridge->base + DGCS); 124 "Read Error DGCS=%08X\n", val); 1083 tmp = ioread32(bridge->base + DGCS); 1128 val = ioread32(bridge->base + DGCS); 1136 iowrite32(val, bridge->base + DGCS); 1140 iowrite32(val, bridge->base + DGCS); 1149 val = ioread32(bridge->base + DGCS); 1154 dev_err(dev, "ca91c042: DMA Error. DGCS [all...] |
H A D | vme_ca91cx42.h | 149 #define DGCS 0x0220 macro 396 * DMA General Control/Status Register (DGCS)
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