Searched refs:DDR_BASE_CS (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-loki/
H A Daddr-map.c36 #define DDR_BASE_CS(n) DDR_REG(0x1504 + ((n) << 3)) macro
100 u32 base = readl(DDR_BASE_CS(i));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-loki/
H A Daddr-map.c36 #define DDR_BASE_CS(n) DDR_REG(0x1504 + ((n) << 3)) macro
100 u32 base = readl(DDR_BASE_CS(i));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-orion5x/
H A Daddr-map.c64 #define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3)) macro
153 u32 base = readl(DDR_BASE_CS(i));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-orion5x/
H A Daddr-map.c64 #define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3)) macro
153 u32 base = readl(DDR_BASE_CS(i));

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