Searched refs:DDRC_CTL (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/pmc-sierra/msp71xx/
H A Dmsp_setup.c66 DDRC_INDIRECT_WRITE(DDRC_CTL(10), 0xb, 1 << 16);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/pmc-sierra/msp71xx/
H A Dmsp_setup.c66 DDRC_INDIRECT_WRITE(DDRC_CTL(10), 0xb, 1 << 16);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/pmc-sierra/msp71xx/
H A Dmsp_regs.h634 #define DDRC_CTL(n) (0x40 + n) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/pmc-sierra/msp71xx/
H A Dmsp_regs.h634 #define DDRC_CTL(n) (0x40 + n) macro

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