Searched refs:DAVINCI_MCASP_PDIR_REG (Results 1 - 2 of 2) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/sound/soc/davinci/ |
| H A D | davinci-mcasp.c | 42 #define DAVINCI_MCASP_PDIR_REG 0x14 macro
132 * DAVINCI_MCASP_PDIR_REG - Pin Direction Register Bits
437 mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, (0x7 << 26));
447 mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, (0x2d << 26));
457 mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, (0x3f << 26));
597 mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG,
601 mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG,
678 mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AFSX);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/sound/soc/davinci/ |
| H A D | davinci-mcasp.c | 42 #define DAVINCI_MCASP_PDIR_REG 0x14 macro
132 * DAVINCI_MCASP_PDIR_REG - Pin Direction Register Bits
437 mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, (0x7 << 26));
447 mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, (0x2d << 26));
457 mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, (0x3f << 26));
597 mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG,
601 mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG,
678 mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, AFSX);
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Completed in 63 milliseconds