Searched refs:CLOCK_INT (Results 1 - 25 of 34) sorted by relevance

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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/iproute2-3.x/include/linux/hdlc/
H A Dioctl.h9 #define CLOCK_INT 2 /* Internal TX and RX clock - DCE */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/include/linux/hdlc/
H A Dioctl.h9 #define CLOCK_INT 2 /* Internal TX and RX clock - DCE */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/include/linux/hdlc/
H A Dioctl.h9 #define CLOCK_INT 2 /* Internal TX and RX clock - DCE */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/iproute2-3.x/include/linux/hdlc/
H A Dioctl.h9 #define CLOCK_INT 2 /* Internal TX and RX clock - DCE */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/toolchains/hndtools-arm-linux-2.6.36-uclibc-4.5.3/usr/include/linux/hdlc/
H A Dioctl.h9 #define CLOCK_INT 2 /* Internal TX and RX clock - DCE */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/toolchains/hndtools-arm-linux-2.6.36-uclibc-4.5.3/arm-linux/sysroot/usr/include/linux/hdlc/
H A Dioctl.h9 #define CLOCK_INT 2 /* Internal TX and RX clock - DCE */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/toolchains/hndtools-arm-linux-2.6.36-uclibc-4.5.3/arm-brcm-linux-uclibcgnueabi/sysroot/usr/include/linux/hdlc/
H A Dioctl.h9 #define CLOCK_INT 2 /* Internal TX and RX clock - DCE */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/iproute2-3.x/include/linux/hdlc/
H A Dioctl.h9 #define CLOCK_INT 2 /* Internal TX and RX clock - DCE */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/wan/
H A Dc101.c157 case CLOCK_INT:
265 new_line.clock_type != CLOCK_INT &&
H A Dpci200syn.c128 case CLOCK_INT:
221 new_line.clock_type != CLOCK_INT &&
H A Dn2.c175 case CLOCK_INT:
283 new_line.clock_type != CLOCK_INT &&
H A Dpc300too.c129 case CLOCK_INT:
246 new_line.clock_type != CLOCK_INT &&
H A Dixp4xx_hss.c401 if (port->clock_type == CLOCK_INT)
1275 if (clk != CLOCK_EXT && clk != CLOCK_INT)
1282 if (clk == CLOCK_INT)
H A Dfarsync.c1924 case CLOCK_INT:
1978 INTCLK ? CLOCK_INT : CLOCK_EXT;
H A Dpc300_drv.c618 if (conf->phys_settings.clock_type == CLOCK_INT) { /* Master mode */
782 if (conf->phys_settings.clock_type == CLOCK_INT) { /* Master mode */
2715 if (clktype == CLOCK_INT || clktype == CLOCK_TXINT) {
2725 if (clktype == CLOCK_INT) {
H A Ddscc4.c957 if (settings->loopback && (settings->clock_type != CLOCK_INT)) {
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/wan/
H A Dc101.c157 case CLOCK_INT:
265 new_line.clock_type != CLOCK_INT &&
H A Dpci200syn.c128 case CLOCK_INT:
221 new_line.clock_type != CLOCK_INT &&
H A Dn2.c175 case CLOCK_INT:
283 new_line.clock_type != CLOCK_INT &&
H A Dpc300too.c129 case CLOCK_INT:
246 new_line.clock_type != CLOCK_INT &&
H A Dixp4xx_hss.c401 if (port->clock_type == CLOCK_INT)
1275 if (clk != CLOCK_EXT && clk != CLOCK_INT)
1282 if (clk == CLOCK_INT)
H A Dfarsync.c1924 case CLOCK_INT:
1978 INTCLK ? CLOCK_INT : CLOCK_EXT;
H A Dpc300_drv.c618 if (conf->phys_settings.clock_type == CLOCK_INT) { /* Master mode */
782 if (conf->phys_settings.clock_type == CLOCK_INT) { /* Master mode */
2715 if (clktype == CLOCK_INT || clktype == CLOCK_TXINT) {
2725 if (clktype == CLOCK_INT) {
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-ixp4xx/
H A Dgoramo_mlr.c142 case CLOCK_INT:
145 return CLOCK_INT;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-ixp4xx/
H A Dgoramo_mlr.c142 case CLOCK_INT:
145 return CLOCK_INT;

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