Searched refs:BRIDGE_INT_TIMER0 (Results 1 - 12 of 12) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-loki/include/mach/
H A Dbridge-regs.h23 #define BRIDGE_INT_TIMER0 0x0002 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-loki/include/mach/
H A Dbridge-regs.h23 #define BRIDGE_INT_TIMER0 0x0002 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-mv78xx0/include/mach/
H A Dbridge-regs.h25 #define BRIDGE_INT_TIMER0 0x0002 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-orion5x/include/mach/
H A Dbridge-regs.h31 #define BRIDGE_INT_TIMER0 0x0002 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-mv78xx0/include/mach/
H A Dbridge-regs.h25 #define BRIDGE_INT_TIMER0 0x0002 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-orion5x/include/mach/
H A Dbridge-regs.h31 #define BRIDGE_INT_TIMER0 0x0002 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-kirkwood/include/mach/
H A Dbridge-regs.h33 #define BRIDGE_INT_TIMER0 0x0002 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-kirkwood/include/mach/
H A Dbridge-regs.h33 #define BRIDGE_INT_TIMER0 0x0002 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-dove/include/mach/
H A Dbridge-regs.h31 #define BRIDGE_INT_TIMER0 0x0002 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-dove/include/mach/
H A Dbridge-regs.h31 #define BRIDGE_INT_TIMER0 0x0002 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-orion/
H A Dtime.c245 writel(u & ~BRIDGE_INT_TIMER0, BRIDGE_MASK);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-orion/
H A Dtime.c245 writel(u & ~BRIDGE_INT_TIMER0, BRIDGE_MASK);

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