Searched refs:A_ST_CLK_DLY (Results 1 - 8 of 8) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/isdn/hisax/ |
H A D | hfc4s8s_l1.h | 44 #define A_ST_CLK_DLY 0x37 macro
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H A D | hfc4s8s_l1.c | 1389 Write_hfc8(hw, A_ST_CLK_DLY,
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/isdn/hisax/ |
H A D | hfc4s8s_l1.h | 44 #define A_ST_CLK_DLY 0x37 macro
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H A D | hfc4s8s_l1.c | 1389 Write_hfc8(hw, A_ST_CLK_DLY,
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/isdn/hardware/mISDN/ |
H A D | hfc_multi.h | 353 #define A_ST_CLK_DLY 0x37 macro 582 /* A_ST_CLK_DLY */ 1134 {"A_ST_CLK_DLY", 0x37},
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H A D | hfcmulti.c | 127 * Give the value of the clock control register (A_ST_CLK_DLY) 133 * Give the value of the clock control register (A_ST_CLK_DLY) 3968 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_nt); 3977 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_te);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/isdn/hardware/mISDN/ |
H A D | hfc_multi.h | 353 #define A_ST_CLK_DLY 0x37 macro 582 /* A_ST_CLK_DLY */ 1134 {"A_ST_CLK_DLY", 0x37},
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H A D | hfcmulti.c | 127 * Give the value of the clock control register (A_ST_CLK_DLY) 133 * Give the value of the clock control register (A_ST_CLK_DLY) 3968 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_nt); 3977 HFC_outb(hc, A_ST_CLK_DLY, clockdelay_te);
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