Searched refs:AT91_ST (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-at91/include/mach/
H A Dat91_st.h19 #define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */
22 #define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */
25 #define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */
30 #define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */
33 #define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */
39 #define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */
40 #define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */
41 #define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */
43 #define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */
46 #define AT91_ST_CRTR (AT91_ST
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H A Dat91rm9200.h92 #define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-at91/include/mach/
H A Dat91_st.h19 #define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */
22 #define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */
25 #define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */
30 #define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */
33 #define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */
39 #define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */
40 #define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */
41 #define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */
43 #define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */
46 #define AT91_ST_CRTR (AT91_ST
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H A Dat91rm9200.h92 #define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ macro

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