Searched refs:AT91_RSTC (Results 1 - 16 of 16) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-at91/include/mach/
H A Dat91_rstc.h19 #define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */
25 #define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */
36 #define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */
H A Dat91sam9261.h80 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat572d940hf.h101 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat91cap9.h99 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat91sam9rl.h88 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat91sam9260.h97 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat91sam9263.h96 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat91sam9g45.h106 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-at91/include/mach/
H A Dat91_rstc.h19 #define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */
25 #define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */
36 #define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */
H A Dat91sam9261.h80 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat572d940hf.h101 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat91cap9.h99 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat91sam9rl.h88 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat91sam9260.h97 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat91sam9263.h96 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro
H A Dat91sam9g45.h106 #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) macro

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