Searched refs:ARM_IDLECT2 (Results 1 - 10 of 10) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap1/ |
H A D | pm.c | 164 omap_readl(ARM_IDLECT2)); 223 #define EN_APICK 6 /* ARM_IDLECT2 */ 286 ARM_SAVE(ARM_IDLECT2); 310 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); 364 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); 446 ARM_SAVE(ARM_IDLECT2); 504 ARM_SHOW(ARM_IDLECT2),
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H A D | sleep.S | 48 * The values of the registers ARM_IDLECT1 and ARM_IDLECT2 are passed 87 @ load base address of ARM_IDLECT1 and ARM_IDLECT2 124 @ reset the ARM_IDLECT1 and ARM_IDLECT2. 171 @ load base address of ARM_IDLECT1 and ARM_IDLECT2 201 * stack, reset the ARM_IDLECT1 and ARM_IDLECT2. 240 @ Load base address of ARM_IDLECT1 and ARM_IDLECT2 350 @ Restore the ARM_IDLECT1 and ARM_IDLECT2.
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H A D | clock_data.c | 93 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 127 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 142 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 153 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 166 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 179 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 334 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 347 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 372 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 386 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap1/ |
H A D | pm.c | 164 omap_readl(ARM_IDLECT2)); 223 #define EN_APICK 6 /* ARM_IDLECT2 */ 286 ARM_SAVE(ARM_IDLECT2); 310 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); 364 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); 446 ARM_SAVE(ARM_IDLECT2); 504 ARM_SHOW(ARM_IDLECT2),
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H A D | sleep.S | 48 * The values of the registers ARM_IDLECT1 and ARM_IDLECT2 are passed 87 @ load base address of ARM_IDLECT1 and ARM_IDLECT2 124 @ reset the ARM_IDLECT1 and ARM_IDLECT2. 171 @ load base address of ARM_IDLECT1 and ARM_IDLECT2 201 * stack, reset the ARM_IDLECT1 and ARM_IDLECT2. 240 @ Load base address of ARM_IDLECT1 and ARM_IDLECT2 350 @ Restore the ARM_IDLECT1 and ARM_IDLECT2.
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H A D | clock_data.c | 93 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 127 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 142 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 153 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 166 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 179 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 334 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 347 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 372 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), 386 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-omap/include/plat/ |
H A D | hardware.h | 75 #define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-omap/include/plat/ |
H A D | hardware.h | 75 #define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/video/omap/ |
H A D | sossi.c | 615 l = omap_readl(ARM_IDLECT2); 617 omap_writel(l, ARM_IDLECT2);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/video/omap/ |
H A D | sossi.c | 615 l = omap_readl(ARM_IDLECT2); 617 omap_writel(l, ARM_IDLECT2);
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