Searched refs:ARM_IDLECT1 (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap1/
H A Dpm.c150 __u32 saved_idlect1 = omap_readl(ARM_IDLECT1);
155 omap_writel(use_idlect1, ARM_IDLECT1);
157 omap_writel(saved_idlect1, ARM_IDLECT1);
163 omap_sram_suspend(omap_readl(ARM_IDLECT1),
285 ARM_SAVE(ARM_IDLECT1);
370 * Restore ARM state, except ARM_IDLECT1/2 which omap_cpu_suspend did
445 ARM_SAVE(ARM_IDLECT1);
503 ARM_SHOW(ARM_IDLECT1),
H A Dsleep.S48 * The values of the registers ARM_IDLECT1 and ARM_IDLECT2 are passed
87 @ load base address of ARM_IDLECT1 and ARM_IDLECT2
111 * used here because r0 holds ARM_IDLECT1
124 @ reset the ARM_IDLECT1 and ARM_IDLECT2.
171 @ load base address of ARM_IDLECT1 and ARM_IDLECT2
193 * used here because r0 holds ARM_IDLECT1
201 * stack, reset the ARM_IDLECT1 and ARM_IDLECT2.
240 @ Load base address of ARM_IDLECT1 and ARM_IDLECT2
258 * used here because r0 holds ARM_IDLECT1
350 @ Restore the ARM_IDLECT1 an
[all...]
H A Dclock_data.c30 /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */
861 omap_writew(0x400, ARM_IDLECT1);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap1/
H A Dpm.c150 __u32 saved_idlect1 = omap_readl(ARM_IDLECT1);
155 omap_writel(use_idlect1, ARM_IDLECT1);
157 omap_writel(saved_idlect1, ARM_IDLECT1);
163 omap_sram_suspend(omap_readl(ARM_IDLECT1),
285 ARM_SAVE(ARM_IDLECT1);
370 * Restore ARM state, except ARM_IDLECT1/2 which omap_cpu_suspend did
445 ARM_SAVE(ARM_IDLECT1);
503 ARM_SHOW(ARM_IDLECT1),
H A Dsleep.S48 * The values of the registers ARM_IDLECT1 and ARM_IDLECT2 are passed
87 @ load base address of ARM_IDLECT1 and ARM_IDLECT2
111 * used here because r0 holds ARM_IDLECT1
124 @ reset the ARM_IDLECT1 and ARM_IDLECT2.
171 @ load base address of ARM_IDLECT1 and ARM_IDLECT2
193 * used here because r0 holds ARM_IDLECT1
201 * stack, reset the ARM_IDLECT1 and ARM_IDLECT2.
240 @ Load base address of ARM_IDLECT1 and ARM_IDLECT2
258 * used here because r0 holds ARM_IDLECT1
350 @ Restore the ARM_IDLECT1 an
[all...]
H A Dclock_data.c30 /* Some ARM_IDLECT1 bit shifts - used in struct arm_idlect1_clk */
861 omap_writew(0x400, ARM_IDLECT1);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-omap/include/plat/
H A Dhardware.h74 #define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-omap/include/plat/
H A Dhardware.h74 #define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) macro

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