Searched refs:phy (Results 1 - 25 of 58) sorted by relevance

123

/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/skfp/
H A Dpcmplc.c219 static void start_pcm_timer0(smc,value,event,phy)
223 struct s_phy *phy;
225 phy->timer0_exp = FALSE ; /* clear timer event flag */
226 smt_timer_start(smc,&phy->pcm_timer0,value,
227 EV_TOKEN(EVENT_PCM+phy->np,event)) ;
233 static void stop_pcm_timer0(smc,phy)
235 struct s_phy *phy;
237 if (phy->pcm_timer0.tm_active)
238 smt_timer_stop(smc,&phy->pcm_timer0) ;
250 struct s_phy *phy ; local
620 struct s_phy *phy ; local
1638 struct s_phy *phy = &smc->y[np] ; local
1680 struct s_phy *phy = &smc->y[np] ; local
1893 struct s_phy *phy ; local
2030 struct s_phy *phy ; local
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H A Dsmt.c297 struct s_phy *phy ; local
359 phy = &smc->y[port] ;
361 if (!phy->mib->fddiPORTHardwarePresent) {
365 cond = (phy->mib->fddiPORTEBError_Ct -
366 phy->mib->fddiPORTOldEBError_Ct > 5) ;
372 (int) (INDEX_PORT+ phy->np) ,cond) ;
377 phy->mib->fddiPORTOldEBError_Ct =
378 phy->mib->fddiPORTEBError_Ct ;
1333 * note: latency has two phy entries by definition
1381 struct smt_phy_rec *phy ; local
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H A Dcfm.c121 static void selection_criteria (smc,phy)
123 struct s_phy *phy ;
126 switch (phy->mib->fddiPORTMy_Type) {
129 phy->wc_flag = TRUE ;
131 phy->wc_flag = FALSE ;
137 phy->wc_flag = FALSE ;
140 phy->wc_flag = FALSE ;
143 phy->wc_flag = FALSE ;
152 struct s_phy *phy ; local
155 for ( p = 0,phy
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H A Ddrvfbi.c669 struct s_phy *phy ; local
673 phy = &smc->y[PA] ;
674 mib_a = phy->mib ;
675 phy = &smc->y[PB] ;
676 mib_b = phy->mib ;
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/
H A Dtlan.c924 u32 phy = priv->phy[priv->phyNum]; local
932 data->phy_id = phy;
1675 u32 phy; local
1694 phy = priv->phy[priv->phyNum];
1702 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts );
1703 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl );
1706 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
1709 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CT
2224 u32 phy; local
2386 u16 i, data0, data1, data2, data3, phy; local
2438 u32 phy; local
2528 u16 phy; local
2559 u16 phy; local
2647 u16 phy; local
2727 u16 phy; local
2796 TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val ) argument
2967 TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val ) argument
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H A Dsis900.c163 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
458 * Search for total of 32 possible mii phy addresses.
459 * Identify and set current phy if found one,
473 /* search for total of 32 possible mii phy addresses */
527 /* Reset phy if default phy is internal sis900 */
542 printk(KERN_WARNING "%s: reset phy and link down now\n", net_dev->name);
578 struct mii_phy *phy = NULL, *phy_home = NULL, *default_phy = NULL; local
581 for( phy=sis_priv->first_mii; phy; ph
1278 struct mii_phy *phy = sis_priv->mii; local
2095 struct mii_phy *phy = NULL; local
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H A Dde4x5.c819 struct mii_phy phy[DE4X5_MAX_PHY]; /* List of attached PHY devices */ member in struct:de4x5_private
1481 if (lp->phy[lp->active].id != 0) {
2809 srom_exec(dev, lp->phy[lp->active].gep);
2811 ana = lp->phy[lp->active].ana | MII_ANA_CSMA;
2812 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII);
2825 mii_wr(ana, MII_ANA, lp->phy[lp->active].addr, DE4X5_MII);
2844 mii_wr(MII_CR_ASSE | MII_CR_RAN, MII_CR, lp->phy[lp->active].addr, DE4X5_MII);
2868 anlpa = mii_rd(MII_ANLPA, lp->phy[lp->active].addr, DE4X5_MII);
2869 ana = mii_rd(MII_ANA, lp->phy[lp->active].addr, DE4X5_MII);
2890 lp->tmp = (lp->phy[l
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H A Dioc3-eth.c82 int phy; member in struct:ioc3_private
473 int phy = ip->phy; local
476 ioc3->micr = (phy << MICR_PHYADDR_SHIFT) | reg | MICR_READTRIG;
485 int phy = ip->phy; local
489 ioc3->micr = (phy << MICR_PHYADDR_SHIFT) | reg;
1141 ip->phy = i;
1520 if (ip->phy == -1) {
1548 "rev %d.\n", dev->name, ip->phy, vendo
1725 unsigned int phy = data[0]; local
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H A Dde4x5.h931 if ((lp->phy[lp->active].id) && (!lp->useSROM || lp->useMII)) {\
934 mii_wr(MII_CR_10|(lp->fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
953 if ((lp->phy[lp->active].id) && (!lp->useSROM || lp->useMII)) {\
955 if (lp->phy[lp->active].id == NATIONAL_TX) {\
956 mii_wr(mii_rd(0x18, lp->phy[lp->active].addr, DE4X5_MII) & ~0x2000,\
957 0x18, lp->phy[lp->active].addr, DE4X5_MII);\
960 sr = mii_rd(MII_SR, lp->phy[lp->active].addr, DE4X5_MII);\
963 mii_wr(MII_CR_100|(fdx?MII_CR_FDM:0), MII_CR, lp->phy[lp->active].addr, DE4X5_MII);\
983 if ((lp->phy[lp->active].id) && (!lp->useSROM || lp->useMII)) {\
984 mii_wr(MII_CR_100|MII_CR_ASSE, MII_CR, lp->phy[l
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H A Deepro100.c490 unsigned short phy[2]; /* PHY media interfaces available. */ member in struct:speedo_private
847 sp->phy[0] = eeprom[6];
848 sp->phy[1] = eeprom[7];
1003 if ((sp->phy[0] & 0x8000) == 0) {
1004 int phy_addr = sp->phy[0] & 0x1f ;
1034 if ((sp->phy[0] & 0x8000) == 0)
1035 sp->mii_if.advertising = mdio_read(dev, sp->phy[0] & 0x1f, MII_ADVERTISE);
1055 if ((sp->phy[0] & 0x8000) == 0)
1056 mdio_read(dev, sp->phy[0] & 0x1f, MII_BMCR);
1178 int phy_num = sp->phy[
2020 int phy = sp->phy[0] & 0x1f; local
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H A Depic100.c68 * pound phy a la SMSC's app note on the subject
497 int phy, phy_idx = 0;
498 for (phy = 1; phy < 32 && phy_idx < sizeof(ep->phys); phy++) {
499 int mii_status = mdio_read(dev, phy, MII_BMSR);
501 ep->phys[phy_idx++] = phy;
504 pdev->slot_name, phy, mdio_read(dev, phy, 0), mii_status);
509 phy
496 int phy, phy_idx = 0; local
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H A Dstarfire.c766 int phy, phy_idx = 0;
768 for (phy = 0; phy < 32 && phy_idx < PHY_CNT; phy++) {
769 mdio_write(dev, phy, MII_BMCR, BMCR_RESET);
773 if ((mdio_read(dev, phy, MII_BMCR) & BMCR_RESET) == 0)
779 mii_status = mdio_read(dev, phy, MII_BMSR);
781 np->phys[phy_idx++] = phy;
782 np->advertising = mdio_read(dev, phy, MII_ADVERTISE);
785 dev->name, phy, mii_statu
765 int phy, phy_idx = 0; local
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H A Dwinbond-840.c501 int phy, phy_idx = 0;
502 for (phy = 1; phy < 32 && phy_idx < MII_CNT; phy++) {
503 int mii_status = mdio_read(dev, phy, MII_BMSR);
505 np->phys[phy_idx++] = phy;
506 np->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
507 np->mii = (mdio_read(dev, phy, MII_PHYSID1) << 16)+
508 mdio_read(dev, phy, MII_PHYSID2);
511 dev->name, np->mii, phy, mii_statu
499 int phy, phy_idx = 0; local
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H A Dvia-rhine.c784 int phy, phy_idx = 0; local
786 for (phy = 1; phy < 32 && phy_idx < MAX_MII_CNT; phy++) {
787 int mii_status = mdio_read(dev, phy, 1);
789 np->phys[phy_idx++] = phy;
790 np->mii_if.advertising = mdio_read(dev, phy, 4);
793 dev->name, phy, mii_status, np->mii_if.advertising,
794 mdio_read(dev, phy, 5));
/asus-wl-520gu-7.0.1.45/src/cfe/cfe/arch/mips/cpu/sb1250/src/
H A Dui_phycmds.c103 cmd_addcmd("phy dump",
107 "phy dump macid [reg]\n\n"
113 "-phy=*;Specify PHY address (default=1)");
115 cmd_addcmd("phy set",
119 "phy set macid reg value\n\n"
124 "-phy=*;Specify PHY address (default=1)");
131 phy_t phy; local
145 phy.sbe_mdio = PHY_PORT(A_MAC_REGISTER(mac,R_MAC_MDIO));
147 if (cmd_sw_value(cmd,"-phy",&x)) {
156 return ui_showerror(CFE_ERR_INV_PARAM,"Invalid phy registe
173 phy_t phy; local
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/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/tulip/
H A Dmedia.c470 int phy = phyn & 0x1f; local
471 int mii_status = tulip_mdio_read (dev, phy, MII_BMSR);
480 mii_reg0 = tulip_mdio_read (dev, phy, MII_BMCR);
481 mii_advert = tulip_mdio_read (dev, phy, MII_ADVERTISE);
489 unsigned int tmpadv = tulip_mdio_read (dev, phy, MII_BMSR);
504 tp->phys[phy_idx++] = phy;
508 board_idx, phy, mii_reg0, mii_status, mii_advert);
514 board_idx, to_advert, phy, mii_advert);
515 tulip_mdio_write (dev, phy, 4, to_advert);
551 tulip_mdio_write (dev, phy, MII_BMC
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/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/atm/
H A Deni.h75 unsigned long phy; /* PHY interface chip registers */ member in struct:eni_dev
H A Didt77105.c341 dev->phy = &idt77105_ops;
370 dev->phy = NULL;
H A Diphase.c742 mb25 = (ia_mb25_t*)iadev->phy;
745 suni_pm7345 = (suni_pm7345_t *)iadev->phy;
751 suni_pm7345 = (suni_pm7345_t *)iadev->phy;
757 suni = (IA_SUNI *)iadev->phy;
770 volatile ia_mb25_t *mb25 = (ia_mb25_t*)iadev->phy;
782 volatile suni_pm7345_t *suni_pm7345 = (suni_pm7345_t *)iadev->phy;
2263 iadev->phy = (u32 *) (base + PHY_BASE);
2273 (u32)iadev->phy, (u32)iadev->ram, (u32)iadev->seg_ram,
2341 writel(value, INPH_IA_DEV(dev)->phy+addr);
2346 return readl(INPH_IA_DEV(dev)->phy
2357 unsigned char phy; local
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/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/usb/
H A Dpegasus.c282 static int read_mii_word(pegasus_t * pegasus, u8 phy, u8 indx, u16 * regd) argument
285 u8 data[4] = { phy, 0, 0, indx };
315 static int write_mii_word(pegasus_t * pegasus, u8 phy, u8 indx, u16 regd) argument
318 u8 data[4] = { phy, 0, 0, indx };
475 read_mii_word(pegasus, pegasus->phy, MII_BMSR, &bmsr);
476 read_mii_word(pegasus, pegasus->phy, MII_BMSR, &bmsr);
477 if (read_mii_word(pegasus, pegasus->phy, MII_LPA, &linkpart))
739 read_mii_word(pegasus, pegasus->phy, MII_BMSR, &tmp);
931 ecmd.phy_address = pegasus->phy;
932 read_mii_word(pegasus, pegasus->phy, MII_BMC
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H A Drtl8150.c101 u8 phy; member in struct:rtl8150
184 static int read_mii_word(rtl8150_t * dev, u8 phy, __u8 indx, u16 * reg) argument
189 data[0] = phy;
208 static int write_mii_word(rtl8150_t * dev, u8 phy, __u8 indx, u16 reg) argument
213 data[0] = phy;
607 ecmd.phy_address = dev->phy;
663 data[0] = dev->phy;
665 read_mii_word(dev, dev->phy, (data[1] & 0x1f), &data[3]);
672 write_mii_word(dev, dev->phy, (data[1] & 0x1f), data[2]);
/asus-wl-520gu-7.0.1.45/src/router/wlconf/
H A Dwlconf.c26 /* phy types */
412 /* query the phy type */
564 /* query the phy type */
610 #define WLCONF_PHYTYPE2BAND(phy) ((phy) == PHY_TYPE_A ? WLC_BAND_5G : WLC_BAND_2G)
612 #define WLCONF_PHYTYPE2STR(phy) ((phy) == PHY_TYPE_A ? "a" : \
613 (phy) == PHY_TYPE_B ? "b" : \
614 (phy) == PHY_TYPE_LP ? "l" : \
615 (phy)
863 char var[80], *next, phy[] = "a", *str, *addr = NULL; local
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/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/pcmcia/
H A D3c574_cs.c519 int phy; local
531 for (phy = 1; phy <= 32; phy++) {
534 mii_status = mdio_read(ioaddr, phy & 0x1f, 1);
536 lp->phys = phy & 0x1f;
538 phy, mii_status);
544 if (phy > 32) {
1220 int phy = lp->phys & 0x1f; local
1230 data[0] = phy;
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H A Dxircom_tulip_cb.c450 int phy, phy_idx; local
463 for (phy = 0, phy_idx = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
464 int mii_status = mdio_read(dev, phy, MII_BMSR);
468 int mii_reg0 = mdio_read(dev, phy, MII_BMCR);
469 int mii_advert = mdio_read(dev, phy, MII_ADVERTISE);
471 tp->phys[phy_idx] = phy;
475 dev->name, phy, mii_reg0, mii_status, mii_advert);
1462 int phy local
[all...]
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/ppc/8xx_io/
H A Dfec.c177 phy_info_t *phy; member in struct:fec_enet_private
1297 fep->phy = phy_info[i];
1301 dev->name, fep->phy_addr, fep->phy->name, fep->phy_id);
1359 mii_do_cmd(dev, fep->phy->ack_int);
1384 if (fep->phy) {
1385 mii_do_cmd(dev, fep->phy->config);
1390 mii_do_cmd(dev, fep->phy->startup);
1393 if(fep->phy == &phy_info_dp83846a)
1457 mii_do_cmd(dev, fep->phy->ack_int);
1505 int phy local
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