Searched refs:VRC5477_IRQ_BASE (Results 1 - 5 of 5) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/ddb5xxx/
H A Dddb5477.h261 #define VRC5477_IRQ_BASE (I8259_IRQ_BASE + NUM_I8259_IRQ) macro
262 #define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ)
268 #define VRC5477_IRQ_CPCE (0 + VRC5477_IRQ_BASE) /* cpu parity error */
269 #define VRC5477_IRQ_CNTD (1 + VRC5477_IRQ_BASE) /* cpu no target */
270 #define VRC5477_IRQ_I2C (2 + VRC5477_IRQ_BASE) /* I2C */
271 #define VRC5477_IRQ_DMA (3 + VRC5477_IRQ_BASE) /* DMA */
272 #define VRC5477_IRQ_UART0 (4 + VRC5477_IRQ_BASE)
273 #define VRC5477_IRQ_WDOG (5 + VRC5477_IRQ_BASE) /* watchdog timer */
274 #define VRC5477_IRQ_SPT1 (6 + VRC5477_IRQ_BASE) /* special purpose timer 1 */
275 #define VRC5477_IRQ_LBRT (7 + VRC5477_IRQ_BASE) /* loca
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/ddb5xxx/
H A Dddb5477.h261 #define VRC5477_IRQ_BASE (I8259_IRQ_BASE + NUM_I8259_IRQ) macro
262 #define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ)
268 #define VRC5477_IRQ_CPCE (0 + VRC5477_IRQ_BASE) /* cpu parity error */
269 #define VRC5477_IRQ_CNTD (1 + VRC5477_IRQ_BASE) /* cpu no target */
270 #define VRC5477_IRQ_I2C (2 + VRC5477_IRQ_BASE) /* I2C */
271 #define VRC5477_IRQ_DMA (3 + VRC5477_IRQ_BASE) /* DMA */
272 #define VRC5477_IRQ_UART0 (4 + VRC5477_IRQ_BASE)
273 #define VRC5477_IRQ_WDOG (5 + VRC5477_IRQ_BASE) /* watchdog timer */
274 #define VRC5477_IRQ_SPT1 (6 + VRC5477_IRQ_BASE) /* special purpose timer 1 */
275 #define VRC5477_IRQ_LBRT (7 + VRC5477_IRQ_BASE) /* loca
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/ddb5xxx/
H A Dddb5477.h261 #define VRC5477_IRQ_BASE (I8259_IRQ_BASE + NUM_I8259_IRQ) macro
262 #define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ)
268 #define VRC5477_IRQ_CPCE (0 + VRC5477_IRQ_BASE) /* cpu parity error */
269 #define VRC5477_IRQ_CNTD (1 + VRC5477_IRQ_BASE) /* cpu no target */
270 #define VRC5477_IRQ_I2C (2 + VRC5477_IRQ_BASE) /* I2C */
271 #define VRC5477_IRQ_DMA (3 + VRC5477_IRQ_BASE) /* DMA */
272 #define VRC5477_IRQ_UART0 (4 + VRC5477_IRQ_BASE)
273 #define VRC5477_IRQ_WDOG (5 + VRC5477_IRQ_BASE) /* watchdog timer */
274 #define VRC5477_IRQ_SPT1 (6 + VRC5477_IRQ_BASE) /* special purpose timer 1 */
275 #define VRC5477_IRQ_LBRT (7 + VRC5477_IRQ_BASE) /* loca
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/ddb5xxx/
H A Dddb5477.h261 #define VRC5477_IRQ_BASE (I8259_IRQ_BASE + NUM_I8259_IRQ) macro
262 #define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ)
268 #define VRC5477_IRQ_CPCE (0 + VRC5477_IRQ_BASE) /* cpu parity error */
269 #define VRC5477_IRQ_CNTD (1 + VRC5477_IRQ_BASE) /* cpu no target */
270 #define VRC5477_IRQ_I2C (2 + VRC5477_IRQ_BASE) /* I2C */
271 #define VRC5477_IRQ_DMA (3 + VRC5477_IRQ_BASE) /* DMA */
272 #define VRC5477_IRQ_UART0 (4 + VRC5477_IRQ_BASE)
273 #define VRC5477_IRQ_WDOG (5 + VRC5477_IRQ_BASE) /* watchdog timer */
274 #define VRC5477_IRQ_SPT1 (6 + VRC5477_IRQ_BASE) /* special purpose timer 1 */
275 #define VRC5477_IRQ_LBRT (7 + VRC5477_IRQ_BASE) /* loca
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/ddb5xxx/ddb5477/
H A Dirq.c134 vrc5477_irq_init(VRC5477_IRQ_BASE);
138 setup_irq(VRC5477_IRQ_BASE + VRC5477_I8259_CASCADE, &irq_cascade);
199 do_IRQ(VRC5477_IRQ_BASE + i, regs);

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