Searched refs:TxEnable (Results 1 - 8 of 8) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/pcmcia/
H A D3c574_cs.c154 TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11, enumerator in enum:el3_cmds
831 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
876 outw(TxEnable, ioaddr + EL3_CMD);
896 outw(TxEnable, ioaddr + EL3_CMD);
985 outw(TxEnable, ioaddr + EL3_CMD);
H A D3c589_cs.c74 TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11, enumerator in enum:c509cmd
641 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
765 outw(TxEnable, ioaddr + EL3_CMD);
785 outw(TxEnable, ioaddr + EL3_CMD);
875 outw(TxEnable, ioaddr + EL3_CMD);
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/
H A D3c509.c122 TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11, enumerator in enum:c509cmd
644 outw(TxEnable, ioaddr + EL3_CMD);
706 if (tx_status & 0x3C) outw(TxEnable, ioaddr + EL3_CMD);
766 if (tx_status & 0x3C) outw(TxEnable, ioaddr + EL3_CMD);
1304 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
H A D3c59x.c597 RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11, enumerator in enum:vortex_cmd
1548 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1804 outw(TxEnable, ioaddr + EL3_CMD);
1849 outw(TxEnable, ioaddr + EL3_CMD);
1911 outw(TxEnable, ioaddr + EL3_CMD);
1964 outw(TxEnable, ioaddr + EL3_CMD);
H A Dsundance.c414 TxEnable=0x0100, TxDisable=0x0200, TxEnabled=0x0400, enumerator in enum:mac_ctrl1_bits
882 writew(StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
1149 writew (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
1209 writew (TxEnable,
H A D3c515.c208 RxDiscard = 8 << 11, TxEnable = 9 << 11, TxDisable = enumerator in enum:corkscrew_cmd
893 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1034 outw(TxEnable, ioaddr + EL3_CMD);
1160 outw(TxEnable, ioaddr + EL3_CMD);
H A Ddl2k.h206 TxEnable = 0x01000000, enumerator in enum:MACCtrl_bits
H A Ddl2k.c477 writel (readl (ioaddr + MACCtrl) | StatsEnable | RxEnable | TxEnable, local
805 writel (readw (dev->base_addr + MACCtrl) | TxEnable, ioaddr + MACCtrl);

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