Searched refs:SiS_Part1Port (Results 1 - 4 of 4) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/video/sis/
H A Dinit301.c314 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,temp); /* TW: CRT2 Horizontal Total */
317 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0x0f,temp); /* TW: CRT2 Horizontal Total Overflow [7:4] */
320 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0A,temp); /* TW: CRT2 Horizontal Display Enable End */
350 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0B,temp); /* TW: CRT2 Horizontal Retrace Start */
364 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x08,temp); /* TW: CRT2 Horizontal Total */
367 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0x0F,temp); /* TW: CRT2 Horizontal Total Overflow [7:4] */
380 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0A,temp); /* TW: CRT2 Horizontal Display Enable End */
422 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0B,temp); /* TW: CRT2 Horizontal Retrace Start */
435 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x0C,temp); /* TW: Overflow */
438 SiS_SetReg1(SiS_Pr->SiS_Part1Port,
[all...]
H A Dinit.c959 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x00,0x00);
960 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x02,*SiS_Pr->pSiS_CRT2Data_1_2);
969 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x2E,0x08); /* use VB */
1821 SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04; /* Digital video interface registers (LCD) */
2251 SiS_SetReg1(SiS_Pr->SiS_Part1Port,0x02,temp);
2468 ( ((pSiS->VGAEngine == SIS_300_VGA) && (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
2469 ((pSiS->VGAEngine == SIS_315_VGA) && (SiS_GetReg1(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) ) {
2499 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2F, 0xFF, 0x01);
2501 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x24, 0xFF, 0x01);
2503 SiS_SetReg1(SiS_Pr->SiS_Part1Port,
[all...]
H A Dvstruct.h202 USHORT SiS_Part1Port; member in struct:_SiS_Private
H A Dsis_main.h77 #define SISPART1 SiS_Pr.SiS_Part1Port

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