Searched refs:RESET_REG_BITS (Results 1 - 8 of 8) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/galileo-boards/ev64120/
H A Di2o.c159 RESET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
163 RESET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
207 RESET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
211 RESET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE,
325 RESET_REG_BITS(INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, BIT2);
351 RESET_REG_BITS(OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE, BIT2);
H A Dirq-handler.c90 RESET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER,
93 RESET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER,
135 // RESET_REG_BITS (INTERRUPT_CAUSE_REGISTER,BIT8);
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/gt64120/common/
H A Dgt_irq.c89 RESET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER,
92 RESET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER,
124 // RESET_REG_BITS (INTERRUPT_CAUSE_REGISTER,BIT8);
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/momentum/ocelot_g/
H A Dgt-irq.c91 RESET_REG_BITS(CPU_INTERRUPT_MASK_REGISTER,
94 RESET_REG_BITS(CPU_HIGH_INTERRUPT_MASK_REGISTER,
167 // RESET_REG_BITS (INTERRUPT_CAUSE_REGISTER,BIT8);
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/galileo-boards/evb64120A/
H A Dcore.h172 * RESET_REG_BITS(regOffset,bits) -
175 * RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
178 #define RESET_REG_BITS(regOffset,bits) \ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/galileo-boards/evb64120A/
H A Dcore.h172 * RESET_REG_BITS(regOffset,bits) -
175 * RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
178 #define RESET_REG_BITS(regOffset,bits) \ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/galileo-boards/evb64120A/
H A Dcore.h172 * RESET_REG_BITS(regOffset,bits) -
175 * RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
178 #define RESET_REG_BITS(regOffset,bits) \ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/galileo-boards/evb64120A/
H A Dcore.h172 * RESET_REG_BITS(regOffset,bits) -
175 * RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
178 #define RESET_REG_BITS(regOffset,bits) \ macro

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