/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/galileo-boards/ev64120/ |
H A D | serialGT.c | 61 #define LCR 0x03 macro 110 * LCR<7> 0 divisor latch access bit 111 * LCR<6> 0 break control (1=send break) 112 * LCR<5> 0 stick parity (0=space, 1=mark) 113 * LCR<4> 0 parity even (0=odd, 1=even) 114 * LCR<3> 0 parity enable (1=enabled) 115 * LCR<2> 0 # stop bits (0=1, 1=1.5) 116 * LCR<1:0> 11 bits per character(00=5, 01=6, 10=7, 11=8) 118 outreg(channel, LCR, 0x3); 135 * Enable access to the divisor latches by setting DLAB in LCR [all...] |
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/x86_64/kernel/ |
H A D | early_printk.c | 70 #define LCR 3 /* Line control */ macro 121 outb(0x3, early_serial_base + LCR); /* 8n1 */ 134 c = inb(early_serial_base + LCR); 135 outb(c | DLAB, early_serial_base + LCR); 138 outb(c & ~DLAB, early_serial_base + LCR);
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/linux/ |
H A D | serialP.h | 76 int LCR; /* Line control register */ member in struct:async_struct
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/linux/ |
H A D | serialP.h | 76 int LCR; /* Line control register */ member in struct:async_struct
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/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/usb/serial/ |
H A D | io_16654.h | 26 // to them via LCR bit 0x80 or LCR = 0xBF. 38 #define LCR 3 // Line Control Register macro
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H A D | io_edgeport.c | 346 __u8 shadowLCR; /* last LCR value received */ 2561 MAKE_CMD_WRITE_REG( &currCmd, &cmdLen, number, LCR, LCR_DL_ENABLE ); 2568 MAKE_CMD_WRITE_REG( &currCmd, &cmdLen, number, LCR, edge_port->shadowLCR); 2636 dbg("%s - write to %s register 0x%02x", (regNum == MCR) ? "MCR" : "LCR", __FUNCTION__, regValue); 2770 /* Send the updated LCR value to the EdgePort */ 2771 status = send_cmd_write_uart_register(edge_port, LCR, edge_port->shadowLCR);
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/net/irda/ |
H A D | nsc-ircc.h | 89 #define LCR 0x03 /* Link control register */ macro
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/net/irda/ |
H A D | nsc-ircc.h | 89 #define LCR 0x03 /* Link control register */ macro
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/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/hamradio/ |
H A D | baycom_ser_fdx.c | 107 #define LCR(iobase) (iobase+3) macro 183 outb(0x81, LCR(dev->base_addr)); /* DLAB = 1 */ 186 outb(0x01, LCR(dev->base_addr)); /* word length = 6 */
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H A D | baycom_ser_hdx.c | 97 #define LCR(iobase) (iobase+3) macro 172 outb(0x81, LCR(dev->base_addr)); /* DLAB = 1 */ 175 outb(0x01, LCR(dev->base_addr)); /* word length = 6 */
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H A D | yam.c | 182 #define LCR(iobase) (iobase+3) macro 322 outb(LCR_DLAB | LCR_BIT5, LCR(iobase)); 326 outb(LCR_BIT5, LCR(iobase)); 449 outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr)); 452 outb(LCR_BIT8, LCR(dev->base_addr));
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/au1000/common/ |
H A D | serial.c | 1128 info->LCR = cval; /* Save LCR */ 1697 info->LCR |= UART_LCR_SBC; 1699 info->LCR &= ~UART_LCR_SBC; 1700 serial_out(info, UART_LCR, info->LCR);
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/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/char/ |
H A D | serial.c | 1259 * Turn off LCR == 0xBF so we actually set the IER 1265 * Now reset LCR so we can turn off the ECB bit 1814 info->LCR = cval; /* Save LCR */ 2409 info->LCR |= UART_LCR_SBC; 2410 serial_out(info, UART_LCR, info->LCR); 2412 info->LCR &= ~UART_LCR_SBC; 2413 serial_out(info, UART_LCR, info->LCR); 2429 info->LCR |= UART_LCR_SBC; 2431 info->LCR [all...] |
H A D | amiserial.c | 882 info->LCR = cval; /* Save LCR */
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/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/isdn/hisax/ |
H A D | hisax.h | 562 u_char LCR; member in struct:elsa_hw
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/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/irda/ |
H A D | nsc-ircc.c | 721 outb(0x03, iobase+LCR); /* 8 bit word length */
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