/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/ |
H A D | cacheops.h | 17 #define Index_Writeback_Inv_D 0x01 macro
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H A D | r4kcache.h | 34 cache_op(Index_Writeback_Inv_D, addr); 132 cache16_unroll32(start,Index_Writeback_Inv_D); 146 cache16_unroll32(start|way,Index_Writeback_Inv_D); 168 cache16_unroll32(start,Index_Writeback_Inv_D); 182 cache16_unroll32(start|way,Index_Writeback_Inv_D); 299 cache32_unroll32(start,Index_Writeback_Inv_D); 313 cache32_unroll32(start|way,Index_Writeback_Inv_D); 350 cache32_unroll32(start,Index_Writeback_Inv_D); 364 cache32_unroll32(start|way,Index_Writeback_Inv_D);
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H A D | bcm4710_cache.h | 53 "i" (Index_Writeback_Inv_D)); 155 cache_unroll(start,Index_Writeback_Inv_D); 184 cache_unroll(start,Index_Writeback_Inv_D);
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H A D | mips32_cache.h | 44 "i" (Index_Writeback_Inv_D)); 190 cache_unroll(start,Index_Writeback_Inv_D); 216 cache_unroll(start,Index_Writeback_Inv_D);
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips64/ |
H A D | cacheops.h | 17 #define Index_Writeback_Inv_D 0x01 macro
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H A D | r10kcacheops.h | 18 #define Index_Writeback_Inv_D 0x01 macro
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H A D | r4kcache.h | 34 cache_op(Index_Writeback_Inv_D, addr); 132 cache16_unroll32(start,Index_Writeback_Inv_D); 146 cache16_unroll32(start|way,Index_Writeback_Inv_D); 168 cache16_unroll32(start,Index_Writeback_Inv_D); 182 cache16_unroll32(start|way,Index_Writeback_Inv_D); 299 cache32_unroll32(start,Index_Writeback_Inv_D); 313 cache32_unroll32(start|way,Index_Writeback_Inv_D); 350 cache32_unroll32(start,Index_Writeback_Inv_D); 364 cache32_unroll32(start|way,Index_Writeback_Inv_D);
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H A D | r10kcache.h | 48 : "r" (addr), "i" (Index_Writeback_Inv_D)); 187 cache32_unroll16(way0, Index_Writeback_Inv_D); 188 cache32_unroll16(way1, Index_Writeback_Inv_D); 212 cache32_unroll16(way0, Index_Writeback_Inv_D); 213 cache32_unroll16(way1, Index_Writeback_Inv_D);
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H A D | mips64_cache.h | 40 "i" (Index_Writeback_Inv_D)); 165 cache_unroll(start,Index_Writeback_Inv_D); 191 cache_unroll(start,Index_Writeback_Inv_D);
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/ |
H A D | cacheops.h | 17 #define Index_Writeback_Inv_D 0x01 macro
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H A D | r4kcache.h | 34 cache_op(Index_Writeback_Inv_D, addr); 132 cache16_unroll32(start,Index_Writeback_Inv_D); 146 cache16_unroll32(start|way,Index_Writeback_Inv_D); 168 cache16_unroll32(start,Index_Writeback_Inv_D); 182 cache16_unroll32(start|way,Index_Writeback_Inv_D); 299 cache32_unroll32(start,Index_Writeback_Inv_D); 313 cache32_unroll32(start|way,Index_Writeback_Inv_D); 350 cache32_unroll32(start,Index_Writeback_Inv_D); 364 cache32_unroll32(start|way,Index_Writeback_Inv_D);
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H A D | bcm4710_cache.h | 54 "i" (Index_Writeback_Inv_D)); 156 cache_unroll(start,Index_Writeback_Inv_D); 185 cache_unroll(start,Index_Writeback_Inv_D);
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H A D | mips32_cache.h | 44 "i" (Index_Writeback_Inv_D)); 190 cache_unroll(start,Index_Writeback_Inv_D); 216 cache_unroll(start,Index_Writeback_Inv_D);
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips64/ |
H A D | cacheops.h | 17 #define Index_Writeback_Inv_D 0x01 macro
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H A D | r10kcacheops.h | 18 #define Index_Writeback_Inv_D 0x01 macro
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H A D | r4kcache.h | 34 cache_op(Index_Writeback_Inv_D, addr); 132 cache16_unroll32(start,Index_Writeback_Inv_D); 146 cache16_unroll32(start|way,Index_Writeback_Inv_D); 168 cache16_unroll32(start,Index_Writeback_Inv_D); 182 cache16_unroll32(start|way,Index_Writeback_Inv_D); 299 cache32_unroll32(start,Index_Writeback_Inv_D); 313 cache32_unroll32(start|way,Index_Writeback_Inv_D); 350 cache32_unroll32(start,Index_Writeback_Inv_D); 364 cache32_unroll32(start|way,Index_Writeback_Inv_D);
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H A D | r10kcache.h | 48 : "r" (addr), "i" (Index_Writeback_Inv_D)); 187 cache32_unroll16(way0, Index_Writeback_Inv_D); 188 cache32_unroll16(way1, Index_Writeback_Inv_D); 212 cache32_unroll16(way0, Index_Writeback_Inv_D); 213 cache32_unroll16(way1, Index_Writeback_Inv_D);
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H A D | mips64_cache.h | 40 "i" (Index_Writeback_Inv_D)); 165 cache_unroll(start,Index_Writeback_Inv_D); 191 cache_unroll(start,Index_Writeback_Inv_D);
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/ |
H A D | cacheops.h | 17 #define Index_Writeback_Inv_D 0x01 macro
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H A D | r4kcache.h | 34 cache_op(Index_Writeback_Inv_D, addr); 132 cache16_unroll32(start,Index_Writeback_Inv_D); 146 cache16_unroll32(start|way,Index_Writeback_Inv_D); 168 cache16_unroll32(start,Index_Writeback_Inv_D); 182 cache16_unroll32(start|way,Index_Writeback_Inv_D); 299 cache32_unroll32(start,Index_Writeback_Inv_D); 313 cache32_unroll32(start|way,Index_Writeback_Inv_D); 350 cache32_unroll32(start,Index_Writeback_Inv_D); 364 cache32_unroll32(start|way,Index_Writeback_Inv_D);
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H A D | bcm4710_cache.h | 53 "i" (Index_Writeback_Inv_D)); 155 cache_unroll(start,Index_Writeback_Inv_D); 184 cache_unroll(start,Index_Writeback_Inv_D);
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/ |
H A D | cacheops.h | 17 #define Index_Writeback_Inv_D 0x01 macro
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H A D | r4kcache.h | 34 cache_op(Index_Writeback_Inv_D, addr); 132 cache16_unroll32(start,Index_Writeback_Inv_D); 146 cache16_unroll32(start|way,Index_Writeback_Inv_D); 168 cache16_unroll32(start,Index_Writeback_Inv_D); 182 cache16_unroll32(start|way,Index_Writeback_Inv_D); 299 cache32_unroll32(start,Index_Writeback_Inv_D); 313 cache32_unroll32(start|way,Index_Writeback_Inv_D); 350 cache32_unroll32(start,Index_Writeback_Inv_D); 364 cache32_unroll32(start|way,Index_Writeback_Inv_D);
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/mm/ |
H A D | c-r5432.c | 70 "i" (Index_Writeback_Inv_D)); 181 cache32_unroll32(start,Index_Writeback_Inv_D); 182 cache32_unroll32(start+1,Index_Writeback_Inv_D); 204 cache32_unroll32(start,Index_Writeback_Inv_D); 205 cache32_unroll32(start+1,Index_Writeback_Inv_D);
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips64/mm/ |
H A D | c-sb1.c | 80 "r" (KSEG0), "i" (Index_Writeback_Inv_D)); 109 "i" (Index_Writeback_Inv_D)); 281 : "0" (addr), "i" (Index_Writeback_Inv_D), "i" (Index_Invalidate_I));
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