Searched refs:IT8172_BASE (Results 1 - 4 of 4) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/it8172/
H A Dit8172.h36 #define IT8172_BASE 0x18000000 macro
40 // System registers offsets from IT8172_BASE
81 // from IT8172_BASE
115 // Memory controller register offsets from IT8172_BASE
125 // Flash/ROM control register offsets from IT8172_BASE
337 #define IT_WRITE(ofs, data) *(volatile u32 *)KSEG1ADDR((IT8172_BASE+ofs)) = data
338 #define IT_READ(ofs, data) data = *(volatile u32 *)KSEG1ADDR((IT8172_BASE+ofs))
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/it8172/
H A Dit8172.h36 #define IT8172_BASE 0x18000000 macro
40 // System registers offsets from IT8172_BASE
81 // from IT8172_BASE
115 // Memory controller register offsets from IT8172_BASE
125 // Flash/ROM control register offsets from IT8172_BASE
337 #define IT_WRITE(ofs, data) *(volatile u32 *)KSEG1ADDR((IT8172_BASE+ofs)) = data
338 #define IT_READ(ofs, data) data = *(volatile u32 *)KSEG1ADDR((IT8172_BASE+ofs))
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/it8172/
H A Dit8172.h36 #define IT8172_BASE 0x18000000 macro
40 // System registers offsets from IT8172_BASE
81 // from IT8172_BASE
115 // Memory controller register offsets from IT8172_BASE
125 // Flash/ROM control register offsets from IT8172_BASE
337 #define IT_WRITE(ofs, data) *(volatile u32 *)KSEG1ADDR((IT8172_BASE+ofs)) = data
338 #define IT_READ(ofs, data) data = *(volatile u32 *)KSEG1ADDR((IT8172_BASE+ofs))
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/it8172/
H A Dit8172.h36 #define IT8172_BASE 0x18000000 macro
40 // System registers offsets from IT8172_BASE
81 // from IT8172_BASE
115 // Memory controller register offsets from IT8172_BASE
125 // Flash/ROM control register offsets from IT8172_BASE
337 #define IT_WRITE(ofs, data) *(volatile u32 *)KSEG1ADDR((IT8172_BASE+ofs)) = data
338 #define IT_READ(ofs, data) data = *(volatile u32 *)KSEG1ADDR((IT8172_BASE+ofs))

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