Searched refs:INT_ENABLE (Results 1 - 5 of 5) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/galileo-boards/ev64120/
H A DserialGT.c52 #define INT_ENABLE 0x04 /* default interrupt mask */ macro
122 outreg(channel, IER, INT_ENABLE); /* Enable appropriate interrupts */
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/tokenring/
H A Dibmtr.c840 writeb(~INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN);
851 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
949 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
1182 writeb((~INT_ENABLE), ti->mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN);
1244 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
1478 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
1867 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
1883 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/linux/
H A Dibmtr.h68 #define INT_ENABLE 0x40 /* Bit 6 - Interrupt enable. If 0, no interrupts will macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/linux/
H A Dibmtr.h68 #define INT_ENABLE 0x40 /* Bit 6 - Interrupt enable. If 0, no interrupts will macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/
H A Deepro.c423 #define INT_ENABLE 0x80 macro
497 #define eepro_en_intline(ioaddr) outb(inb(ioaddr + REG1) | INT_ENABLE,\

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