Searched refs:INT_CLK (Results 1 - 4 of 4) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-m68k/
H A Dmacints.h152 #define INT_CLK 24576 /* CLK while int_clk =2.456MHz and divide = 100 */ macro
H A Datariints.h109 #define INT_CLK 24576 /* CLK while int_clk =2.456MHz and divide = 100 */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-m68k/
H A Dmacints.h152 #define INT_CLK 24576 /* CLK while int_clk =2.456MHz and divide = 100 */ macro
H A Datariints.h109 #define INT_CLK 24576 /* CLK while int_clk =2.456MHz and divide = 100 */ macro

Completed in 37 milliseconds