Searched refs:DDB_PCICTL0_H (Results 1 - 7 of 7) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/ddb5xxx/ddb5477/
H A Dpci.c184 temp = ddb_in32(DDB_PCICTL0_H);
186 ddb_out32(DDB_PCICTL0_H, temp);
188 ddb_out32(DDB_PCICTL0_H, temp);
H A Ddebug.c115 {"DDB_PCICTL0_H", DDB_BASE + DDB_PCICTL0_H},
H A Dsetup.c329 ddb_out32(DDB_PCICTL0_H, 0);
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/ddb5xxx/
H A Dddb5477.h124 #define DDB_PCICTL0_H 0x02e4 /* PCI0 Control-H */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/ddb5xxx/
H A Dddb5477.h124 #define DDB_PCICTL0_H 0x02e4 /* PCI0 Control-H */ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/ddb5xxx/
H A Dddb5477.h124 #define DDB_PCICTL0_H 0x02e4 /* PCI0 Control-H */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/ddb5xxx/
H A Dddb5477.h124 #define DDB_PCICTL0_H 0x02e4 /* PCI0 Control-H */ macro

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