Searched refs:DDB_PCI0_MEM_BASE (Results 1 - 6 of 6) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/ddb5xxx/ddb5477/
H A Dpci.c34 DDB_PCI0_MEM_BASE + 0x100000,
35 DDB_PCI0_MEM_BASE + DDB_PCI0_MEM_SIZE -1,
H A Dsetup.c270 ddb_set_pdar(DDB_PCIW0, DDB_PCI0_MEM_BASE, DDB_PCI0_MEM_SIZE, 32, 0, 1);
309 ddb_set_pmr(DDB_PCIINIT00, DDB_PCICMD_MEM, DDB_PCI0_MEM_BASE,
322 ddb_set_pdar(DDB_BARP01, DDB_PCI0_MEM_BASE, DDB_PCI0_MEM_SIZE, 32, 0, 1);
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/ddb5xxx/
H A Dddb5477.h180 #define DDB_PCI0_MEM_BASE 0x08000000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/ddb5xxx/
H A Dddb5477.h180 #define DDB_PCI0_MEM_BASE 0x08000000 macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/ddb5xxx/
H A Dddb5477.h180 #define DDB_PCI0_MEM_BASE 0x08000000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/ddb5xxx/
H A Dddb5477.h180 #define DDB_PCI0_MEM_BASE 0x08000000 macro

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