Searched refs:DDB_IOPCIW0 (Results 1 - 7 of 7) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/ddb5xxx/ddb5477/
H A Ddebug.c72 {"DDB_IOPCIW0", DDB_BASE + DDB_IOPCIW0},
120 {"DDB_IOPCIW0", DDB_BASE + DDB_IOPCIW0},
H A Dpci_ops.c57 DDB_IOPCIW0,
H A Dsetup.c272 ddb_set_pdar(DDB_IOPCIW0, DDB_PCI1_MEM_BASE, DDB_PCI1_MEM_SIZE, 32, 0, 1);
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/ddb5xxx/
H A Dddb5477.h131 #define DDB_IOPCIW0 0x00d0 /* PCI Address Window 0 [R/W] */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/ddb5xxx/
H A Dddb5477.h131 #define DDB_IOPCIW0 0x00d0 /* PCI Address Window 0 [R/W] */ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/ddb5xxx/
H A Dddb5477.h131 #define DDB_IOPCIW0 0x00d0 /* PCI Address Window 0 [R/W] */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/ddb5xxx/
H A Dddb5477.h131 #define DDB_IOPCIW0 0x00d0 /* PCI Address Window 0 [R/W] */ macro

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