Searched refs:DDB_INTCTRL1 (Results 1 - 6 of 6) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/ddb5xxx/ddb5477/
H A Ddebug.c42 {"DDB_INTCTRL1", DDB_BASE + DDB_INTCTRL1},
H A Dirq.c89 ddb_out32(DDB_INTCTRL1, 0);
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/ddb5xxx/
H A Dddb5477.h39 #define DDB_INTCTRL1 0x0404 /* Interrupt Control 1 */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/ddb5xxx/
H A Dddb5477.h39 #define DDB_INTCTRL1 0x0404 /* Interrupt Control 1 */ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/ddb5xxx/
H A Dddb5477.h39 #define DDB_INTCTRL1 0x0404 /* Interrupt Control 1 */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/ddb5xxx/
H A Dddb5477.h39 #define DDB_INTCTRL1 0x0404 /* Interrupt Control 1 */ macro

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