Searched refs:DDB_INT1STAT (Results 1 - 6 of 6) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/ddb5xxx/ddb5477/
H A Ddebug.c46 {"DDB_INT1STAT", DDB_BASE + DDB_INT1STAT},
H A Dirq.c178 if (ddb_in32(DDB_INT1STAT) != 0) {
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/ddb5xxx/
H A Dddb5477.h44 #define DDB_INT1STAT 0x0428 /* INT1 Status [R] */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/ddb5xxx/
H A Dddb5477.h44 #define DDB_INT1STAT 0x0428 /* INT1 Status [R] */ macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/ddb5xxx/
H A Dddb5477.h44 #define DDB_INT1STAT 0x0428 /* INT1 Status [R] */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/ddb5xxx/
H A Dddb5477.h44 #define DDB_INT1STAT 0x0428 /* INT1 Status [R] */ macro

Completed in 63 milliseconds