Searched refs:CSR0_MISS (Results 1 - 11 of 11) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/
H A Dni65.h22 #define CSR0_MISS 0x1000 /* Missed packet (RC) */ macro
H A Dsk_g16.h54 #define CSR0_MISS 0x1000 /* Missed packet (RC) */ macro
H A Dam79c961a.h43 #define CSR0_MISS 0x1000 macro
H A Dsk_mca.h89 #define CSR0_MISS 0x1000 /* lost Rx block */ macro
H A Dam79c961a.c199 write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP);
562 write_rreg(dev->base_addr, CSR0, status & (CSR0_TINT|CSR0_RINT|CSR0_MISS|CSR0_IENA));
568 if (status & CSR0_MISS)
H A Dsun3lance.c230 #define CSR0_MISS 0x1000 /* missed frame (RC) */ macro
655 DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS;
725 if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */
738 // DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
H A Datarilance.c330 #define CSR0_MISS 0x1000 /* missed frame (RC) */ macro
937 if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */
947 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
H A Dbagetlance.c318 #define CSR0_MISS 0x1000 /* missed frame (RC) */ macro
1069 if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */
1079 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
H A Dsk_mca.c598 SetLANCE(dev, LANCE_CSR0, oldcsr0 | CSR0_MISS);
789 if ((csr0val & CSR0_MISS) != 0)
H A Dni65.c817 if(csr0 & CSR0_MISS) {
985 if(!(csr0 & CSR0_MISS)) /* don't count errors twice */
H A Dsk_g16.c1376 if (csr0 & CSR0_MISS) /* No place to store packet ? */

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