Searched refs:CPU_IRQ_BASE (Results 1 - 19 of 19) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/ddb5xxx/ddb5476/
H A Dint-handler.S66 li a0, CPU_IRQ_BASE + 0
72 li a0, CPU_IRQ_BASE + 1
83 li a0, CPU_IRQ_BASE + 3
89 li a0, CPU_IRQ_BASE + 4
95 li a0, CPU_IRQ_BASE + 5
101 li a0, CPU_IRQ_BASE + 6
107 li a0, CPU_IRQ_BASE + 7
H A Dirq.c131 mips_cpu_irq_init(CPU_IRQ_BASE);
135 setup_irq(CPU_IRQ_BASE + CPU_VRC5476_CASCADE, &irq_cascade);
H A Dsetup.c103 setup_irq(CPU_IRQ_BASE + 7, irq);
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/ddb5xxx/
H A Dddb5074.h30 #define CPU_IRQ_BASE (NUM_NILE4_INTERRUPTS + NILE4_IRQ_BASE) macro
H A Dddb5476.h85 #define CPU_IRQ_BASE (VRC5476_IRQ_BASE + NUM_VRC5476_IRQ) macro
H A Dddb5477.h262 #define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ) macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/ddb5xxx/
H A Dddb5074.h30 #define CPU_IRQ_BASE (NUM_NILE4_INTERRUPTS + NILE4_IRQ_BASE) macro
H A Dddb5476.h85 #define CPU_IRQ_BASE (VRC5476_IRQ_BASE + NUM_VRC5476_IRQ) macro
H A Dddb5477.h262 #define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ) macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/ddb5xxx/
H A Dddb5074.h30 #define CPU_IRQ_BASE (NUM_NILE4_INTERRUPTS + NILE4_IRQ_BASE) macro
H A Dddb5476.h85 #define CPU_IRQ_BASE (VRC5476_IRQ_BASE + NUM_VRC5476_IRQ) macro
H A Dddb5477.h262 #define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ) macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/ddb5xxx/
H A Dddb5074.h30 #define CPU_IRQ_BASE (NUM_NILE4_INTERRUPTS + NILE4_IRQ_BASE) macro
H A Dddb5476.h85 #define CPU_IRQ_BASE (VRC5476_IRQ_BASE + NUM_VRC5476_IRQ) macro
H A Dddb5477.h262 #define CPU_IRQ_BASE (VRC5477_IRQ_BASE + NUM_VRC5477_IRQ) macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/ddb5xxx/ddb5477/
H A Dint-handler.S59 li a0, CPU_IRQ_BASE + 7
66 li a0, CPU_IRQ_BASE + 0
72 li a0, CPU_IRQ_BASE + 1
H A Dirq.c133 mips_cpu_irq_init(CPU_IRQ_BASE);
139 setup_irq(CPU_IRQ_BASE + CPU_VRC5477_CASCADE, &irq_cascade);
H A Dsetup.c157 setup_irq(CPU_IRQ_BASE + 7, irq);
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/ddb5xxx/ddb5074/
H A Dirq.c147 setup_irq(CPU_IRQ_BASE + CPU_NILE4_CASCADE, &irq_cascade);
156 printk("CPU_IRQ_BASE: %d\n",CPU_IRQ_BASE);
158 mips_cpu_irq_init(CPU_IRQ_BASE);

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