Searched refs:CHMCTRL_TCTRL4 (Results 1 - 3 of 3) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-sparc64/
H A Dchmctrl.h9 #define CHMCTRL_TCTRL4 0x40 /* Memory Timing Control IV */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-sparc64/
H A Dchmctrl.h9 #define CHMCTRL_TCTRL4 0x40 /* Memory Timing Control IV */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/sparc64/kernel/
H A Dchmc.c359 mp->timing_control4 = read_mcreg(mp, CHMCTRL_TCTRL4);

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