Searched refs:pin (Results 76 - 100 of 826) sorted by relevance

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/linux-master/arch/sh/drivers/pci/
H A Dfixups-snapgear.c20 int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) argument
33 printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n",
34 slot, pin - 1 + 'A', irq);
H A Dfixups-sdk7780.c37 int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) argument
39 return sdk7780_irq_tab[pin-1][slot];
H A Dfixups-landisk.c21 int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin) argument
29 int irq = ((slot + pin - 1) & 0x3) + evt2irq(0x2a0);
31 if ((slot | (pin - 1)) > 0x3) {
32 printk(KERN_WARNING "PCI: Bad IRQ mapping request for slot %d pin %c\n",
33 slot, pin - 1 + 'A');
/linux-master/include/linux/
H A Dof_pci.h32 int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
35 of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin) argument
/linux-master/drivers/media/cec/core/
H A DMakefile9 cec-objs += cec-pin.o
13 cec-objs += cec-pin-error-inj.o
/linux-master/drivers/pinctrl/bcm/
H A Dpinctrl-bcm63xx.h36 static inline unsigned int bcm63xx_bank_pin(unsigned int pin) argument
38 return pin % BCM63XX_BANK_GPIOS;
/linux-master/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
H A Dled.c9 void rtl8723e_sw_led_on(struct ieee80211_hw *hw, enum rtl_led_pin pin) argument
15 "LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pin);
17 switch (pin) {
31 pr_err("switch case %#x not processed\n", pin);
36 void rtl8723e_sw_led_off(struct ieee80211_hw *hw, enum rtl_led_pin pin) argument
42 "LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pin);
46 switch (pin) {
70 pr_err("switch case %#x not processed\n", pin);
/linux-master/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
H A Dled.c9 void rtl8723be_sw_led_on(struct ieee80211_hw *hw, enum rtl_led_pin pin) argument
15 "LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pin);
17 switch (pin) {
30 pr_err("switch case %#x not processed\n", pin);
35 void rtl8723be_sw_led_off(struct ieee80211_hw *hw, enum rtl_led_pin pin) argument
41 "LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pin);
45 switch (pin) {
69 pr_err("switch case %#x not processed\n", pin);
/linux-master/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
H A Dled.c9 void rtl88ee_sw_led_on(struct ieee80211_hw *hw, enum rtl_led_pin pin) argument
15 "LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pin);
17 switch (pin) {
31 "switch case %#x not processed\n", pin);
36 void rtl88ee_sw_led_off(struct ieee80211_hw *hw, enum rtl_led_pin pin) argument
42 "LedAddr:%X ledpin=%d\n", REG_LEDCFG2, pin);
44 switch (pin) {
67 "switch case %#x not processed\n", pin);
/linux-master/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
H A Dled.c9 void rtl92de_sw_led_on(struct ieee80211_hw *hw, enum rtl_led_pin pin) argument
15 REG_LEDCFG2, pin);
17 switch (pin) {
39 pr_err("switch case %#x not processed\n", pin);
44 void rtl92de_sw_led_off(struct ieee80211_hw *hw, enum rtl_led_pin pin) argument
50 REG_LEDCFG2, pin);
54 switch (pin) {
71 pr_err("switch case %#x not processed\n", pin);
/linux-master/drivers/gpio/
H A Dgpio-sama5d2-piobu.c53 * sama5d2_piobu_setup_pin() - prepares a pin for set_direction call
55 * Do not consider pin for tamper detection (normal and backup modes)
56 * Do not consider pin as tamper wakeup interrupt source
58 static int sama5d2_piobu_setup_pin(struct gpio_chip *chip, unsigned int pin) argument
63 unsigned int mask = BIT(PIOBU_DET_OFFSET + pin);
77 * sama5d2_piobu_write_value() - writes value & mask at the pin's PIOBU register
79 static int sama5d2_piobu_write_value(struct gpio_chip *chip, unsigned int pin, argument
86 reg = PIOBU_BASE + pin * PIOBU_REG_SIZE;
92 * sama5d2_piobu_read_value() - read the value with masking from the pin's PIOBU
95 static int sama5d2_piobu_read_value(struct gpio_chip *chip, unsigned int pin, argument
114 sama5d2_piobu_get_direction(struct gpio_chip *chip, unsigned int pin) argument
129 sama5d2_piobu_direction_input(struct gpio_chip *chip, unsigned int pin) argument
138 sama5d2_piobu_direction_output(struct gpio_chip *chip, unsigned int pin, int value) argument
153 sama5d2_piobu_get(struct gpio_chip *chip, unsigned int pin) argument
172 sama5d2_piobu_set(struct gpio_chip *chip, unsigned int pin, int value) argument
[all...]
/linux-master/drivers/pinctrl/meson/
H A Dpinctrl-meson-axg-pmx.c15 * register bit to select the function for each pin.
29 unsigned int pin,
36 if (pin >= pmx->pmx_banks[i].first &&
37 pin <= pmx->pmx_banks[i].last) {
46 unsigned int pin, unsigned int *reg,
51 shift = pin - bank->first;
60 unsigned int pin, unsigned int func)
67 ret = meson_axg_pmx_get_bank(pc, pin, &bank);
71 meson_pmx_calc_reg_and_offset(bank, pin, &reg, &offset);
28 meson_axg_pmx_get_bank(struct meson_pinctrl *pc, unsigned int pin, struct meson_pmx_bank **bank) argument
45 meson_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank, unsigned int pin, unsigned int *reg, unsigned int *offset) argument
59 meson_axg_pmx_update_function(struct meson_pinctrl *pc, unsigned int pin, unsigned int func) argument
/linux-master/include/linux/pinctrl/
H A Dmachine.h40 * @group_or_pin: the name of the pin or group whose configuration parameters
43 * hardware. Each individual pin controller defines the format and meaning
57 * same name as the pin controllers own dev_name(), the map entry will be
108 #define PIN_MAP_CONFIGS_PIN(dev, state, pinctrl, pin, cfgs) \
115 .group_or_pin = pin, \
121 #define PIN_MAP_CONFIGS_PIN_DEFAULT(dev, pinctrl, pin, cfgs) \
122 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_DEFAULT, pinctrl, pin, cfgs)
124 #define PIN_MAP_CONFIGS_PIN_HOG(dev, state, pin, cfgs) \
125 PIN_MAP_CONFIGS_PIN(dev, state, dev, pin, cfgs)
127 #define PIN_MAP_CONFIGS_PIN_HOG_DEFAULT(dev, pin, cfg
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H A Dpinconf.h20 * struct pinconf_ops - pin config operations, to be implemented by
21 * pin configuration capable drivers.
22 * @is_generic: for pin controllers that want to use the generic interface,
24 * @pin_config_get: get the config of a certain pin, if the requested config
27 * @pin_config_set: configure an individual pin
28 * @pin_config_group_get: get configurations for an entire pin group; should
32 * per-device info for a certain pin in debugfs
36 * and display a driver's pin configuration parameter
43 unsigned int pin,
46 unsigned int pin,
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/linux-master/drivers/pinctrl/
H A Dpinmux.h3 * Internal interface between the core pin control system and the
29 bool pinmux_can_be_used_for_gpio(struct pinctrl_dev *pctldev, unsigned int pin);
33 unsigned int pin, unsigned int gpio);
34 void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned int pin,
38 unsigned int pin, bool input);
59 unsigned int pin)
66 unsigned int pin, unsigned int gpio)
72 unsigned int pin,
79 unsigned int pin, bool input)
137 * @group_names: array of pin grou
58 pinmux_can_be_used_for_gpio(struct pinctrl_dev *pctldev, unsigned int pin) argument
64 pinmux_request_gpio(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin, unsigned int gpio) argument
71 pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned int pin, struct pinctrl_gpio_range *range) argument
77 pinmux_gpio_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin, bool input) argument
[all...]
H A Dpinctrl-max77620.c3 * MAX77620 pin control driver.
272 unsigned int pin, unsigned long *config)
283 if (mpci->pin_info[pin].drv_type == MAX77620_PIN_OD_DRV)
288 if (mpci->pin_info[pin].drv_type == MAX77620_PIN_PP_DRV)
298 if (val & BIT(pin))
308 if (val & BIT(pin))
339 int pin, int param)
341 struct max77620_fps_config *fps_config = &mpci->fps_config[pin];
346 if ((pin < MAX77620_GPIO1) || (pin > MAX77620_GPIO
271 max77620_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) argument
338 max77620_set_fps_param(struct max77620_pctrl_info *mpci, int pin, int param) argument
394 max77620_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, unsigned int num_configs) argument
615 int pin, p; local
631 int pin, p; local
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H A Dpinctrl-lantiq.c76 const char *group, *pin; local
116 of_property_for_each_string(np, "lantiq,pins", prop, pin) {
121 (*map)->name = pin;
122 (*map)->data.configs.group_or_pin = pin;
225 /* don't assume .mfp is linearly mapped. find the mfp with the correct .pin */
226 static int match_mfp(const struct ltq_pinmux_info *info, int pin) argument
230 if (info->mfp[i].pin == pin)
236 /* check whether current pin configuration is valid. Negative for failure */
241 int i, pin, re local
265 int i, pin, pin_func, ret; local
292 ltq_pmx_gpio_request_enable(struct pinctrl_dev *pctrldev, struct pinctrl_gpio_range *range, unsigned pin) argument
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H A Dpinconf.c3 * Core driver for the pin config portions of the pin control subsystem
43 pr_err("failed to register map %s (%d): no group/pin given\n",
58 int pin_config_get_for_pin(struct pinctrl_dev *pctldev, unsigned int pin, argument
65 "cannot get pin configuration, .pin_config_get missing in driver\n");
69 return ops->pin_config_get(pctldev, pin, config);
91 "cannot get configuration for pin group, missing group config get function in driver\n");
113 int pin; local
117 pin = pin_get_from_name(pctldev,
119 if (pin <
202 pinconf_set_config(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, size_t nconfigs) argument
293 pinconf_dump_pin(struct pinctrl_dev *pctldev, struct seq_file *s, int pin) argument
307 unsigned int i, pin; local
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/linux-master/arch/arm/mach-orion5x/
H A Dts209-setup.c107 int pin; local
112 pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
113 if (gpio_request(pin, "PCI Int1") == 0) {
114 if (gpio_direction_input(pin) == 0) {
115 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
118 "set_irq_type pin %d\n", pin);
119 gpio_free(pin);
123 "%d\n", pin);
126 pin
141 qnap_ts209_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
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/linux-master/drivers/net/ethernet/intel/ice/
H A Dice_dpll.c14 * enum ice_dpll_pin_type - enumerate ice pin types:
15 * @ICE_DPLL_PIN_INVALID: invalid pin type
16 * @ICE_DPLL_PIN_TYPE_INPUT: input pin
17 * @ICE_DPLL_PIN_TYPE_OUTPUT: output pin
18 * @ICE_DPLL_PIN_TYPE_RCLK_INPUT: recovery clock input pin
54 * ice_dpll_pin_freq_set - set pin's frequency
56 * @pin: pointer to a pin
57 * @pin_type: type of pin being configured
61 * Set requested frequency on a pin
69 ice_dpll_pin_freq_set(struct ice_pf *pf, struct ice_dpll_pin *pin, enum ice_dpll_pin_type pin_type, const u32 freq, struct netlink_ext_ack *extack) argument
121 ice_dpll_frequency_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, const u32 frequency, struct netlink_ext_ack *extack, enum ice_dpll_pin_type pin_type) argument
159 ice_dpll_input_frequency_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u64 frequency, struct netlink_ext_ack *extack) argument
184 ice_dpll_output_frequency_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u64 frequency, struct netlink_ext_ack *extack) argument
210 ice_dpll_frequency_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u64 *frequency, struct netlink_ext_ack *extack, enum ice_dpll_pin_type pin_type) argument
243 ice_dpll_input_frequency_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u64 *frequency, struct netlink_ext_ack *extack) argument
268 ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u64 *frequency, struct netlink_ext_ack *extack) argument
292 ice_dpll_pin_enable(struct ice_hw *hw, struct ice_dpll_pin *pin, u8 dpll_idx, enum ice_dpll_pin_type pin_type, struct netlink_ext_ack *extack) argument
341 ice_dpll_pin_disable(struct ice_hw *hw, struct ice_dpll_pin *pin, enum ice_dpll_pin_type pin_type, struct netlink_ext_ack *extack) argument
388 ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin, enum ice_dpll_pin_type pin_type, struct netlink_ext_ack *extack) argument
505 ice_dpll_hw_input_prio_set(struct ice_pf *pf, struct ice_dpll *dpll, struct ice_dpll_pin *pin, const u32 prio, struct netlink_ext_ack *extack) argument
602 ice_dpll_pin_state_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, bool enable, struct netlink_ext_ack *extack, enum ice_dpll_pin_type pin_type) argument
645 ice_dpll_output_state_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state state, struct netlink_ext_ack *extack) argument
678 ice_dpll_input_state_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state state, struct netlink_ext_ack *extack) argument
707 ice_dpll_pin_state_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state *state, struct netlink_ext_ack *extack, enum ice_dpll_pin_type pin_type) argument
752 ice_dpll_output_state_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state *state, struct netlink_ext_ack *extack) argument
778 ice_dpll_input_state_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_state *state, struct netlink_ext_ack *extack) argument
804 ice_dpll_input_prio_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u32 *prio, struct netlink_ext_ack *extack) argument
836 ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, u32 prio, struct netlink_ext_ack *extack) argument
870 ice_dpll_input_direction(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_direction *direction, struct netlink_ext_ack *extack) argument
895 ice_dpll_output_direction(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, enum dpll_pin_direction *direction, struct netlink_ext_ack *extack) argument
922 ice_dpll_pin_phase_adjust_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s32 *phase_adjust, struct netlink_ext_ack *extack) argument
956 ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s32 phase_adjust, struct netlink_ext_ack *extack, enum ice_dpll_pin_type type) argument
1025 ice_dpll_input_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s32 phase_adjust, struct netlink_ext_ack *extack) argument
1053 ice_dpll_output_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s32 phase_adjust, struct netlink_ext_ack *extack) argument
1084 ice_dpll_phase_offset_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_device *dpll, void *dpll_priv, s64 *phase_offset, struct netlink_ext_ack *extack) argument
1118 ice_dpll_rclk_state_on_pin_set(const struct dpll_pin *pin, void *pin_priv, const struct dpll_pin *parent_pin, void *parent_pin_priv, enum dpll_pin_state state, struct netlink_ext_ack *extack) argument
1176 ice_dpll_rclk_state_on_pin_get(const struct dpll_pin *pin, void *pin_priv, const struct dpll_pin *parent_pin, void *parent_pin_priv, enum dpll_pin_state *state, struct netlink_ext_ack *extack) argument
1622 ice_dpll_init_rclk_pins(struct ice_pf *pf, struct ice_dpll_pin *pin, int start_idx, const struct dpll_pin_ops *ops) argument
1940 struct ice_dpll_pin *pin = &pf->dplls.rclk; local
[all...]
/linux-master/arch/sparc/include/asm/
H A Dleon_pci.h17 int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
/linux-master/arch/mips/pci/
H A Dpci-bcm47xx.c31 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) argument
40 u8 slot, pin; local
48 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
50 res = ssb_pcibios_map_irq(dev, slot, pin);
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/
H A Dgpio_base.c63 if (gpio->pin) {
82 if (!gpio->pin) {
87 return gpio->pin->funcs->get_value(gpio->pin, value);
94 if (!gpio->pin) {
99 return gpio->pin->funcs->set_value(gpio->pin, value);
124 if (!gpio->pin) {
129 return gpio->pin->funcs->change_mode(gpio->pin, mod
[all...]
/linux-master/arch/arm/mach-s3c/
H A Dgpio-core.h87 * samsung_gpiolib_to_irq - convert gpio pin to irq number
88 * @chip: The gpio chip that the pin belongs to.
89 * @offset: The offset of the pin in the chip.
108 static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin) argument
112 if (pin > S3C_GPIO_END)
115 chip = &s3c24xx_gpios[pin/32];
116 return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
H A Dgpio-cfg.h8 * S3C Platform - GPIO pin configuration
12 * pin configuration done such as setting a pin to input or output or
64 /* Defines for generic pin configurations */
73 * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
74 * @pin pin The pin number to configure.
75 * @to to The configuration for the pin's function.
78 * pin, suc
153 s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size, unsigned int cfg) argument
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