| /linux-master/arch/alpha/include/asm/ |
| H A D | processor.h | 46 #define cpu_relax() barrier()
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| /linux-master/drivers/md/dm-vdo/indexer/ |
| H A D | sparse-cache.c | 27 * via the careful use of barrier messages sent to all the index zones by the triage queue worker
37 * and the serialization of the barrier requests from the triage queue ensures they will all
41 * are known to be blocked, waiting in the second barrier. Outside that critical section, all the
144 /* Lock for this barrier object */
146 /* Semaphore for threads waiting at this barrier */
150 /* Total number of threads using this barrier */
169 static void initialize_threads_barrier(struct threads_barrier *barrier, argument
172 sema_init(&barrier->lock, 1);
173 barrier->arrived = 0;
174 barrier
199 enter_threads_barrier(struct threads_barrier *barrier) argument
[all...] |
| /linux-master/tools/testing/selftests/perf_events/ |
| H A D | sigtrap_threads.c | 89 pthread_barrier_t *barrier = (pthread_barrier_t *)arg; local
94 pthread_barrier_wait(barrier);
114 pthread_barrier_t barrier; local
137 pthread_barrier_init(&self->barrier, NULL, NUM_THREADS + 1);
139 ASSERT_EQ(pthread_create(&self->threads[i], NULL, test_thread, &self->barrier), 0);
144 pthread_barrier_destroy(&self->barrier);
154 pthread_barrier_wait(&self->barrier);
225 pthread_barrier_wait(&self->barrier);
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| /linux-master/include/linux/ |
| H A D | rcupdate_trace.h | 53 barrier();
76 barrier(); // Critical section before disabling.
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| /linux-master/arch/x86/include/asm/ |
| H A D | debugreg.h | 136 barrier();
148 barrier();
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| /linux-master/tools/testing/selftests/futex/functional/ |
| H A D | futex_wait_timeout.c | 27 static pthread_barrier_t barrier; variable
52 pthread_barrier_wait(&barrier);
136 pthread_barrier_init(&barrier, NULL, 2);
171 pthread_barrier_wait(&barrier);
172 pthread_barrier_destroy(&barrier);
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| /linux-master/tools/include/linux/ |
| H A D | compiler.h | 37 /* Optimization barrier */
39 #define barrier() __asm__ __volatile__("": : :"memory") macro
151 barrier();
153 barrier();
165 barrier();
167 barrier();
188 * with an explicit memory barrier or atomic instruction that provides the
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| /linux-master/arch/arm/mm/ |
| H A D | tlb-fa.S | 47 mcr p15, 0, r3, c7, c10, 4 @ data write barrier
60 mcr p15, 0, r3, c7, c10, 4 @ data write barrier
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| /linux-master/arch/arm/include/asm/ |
| H A D | cp15.h | 5 #include <asm/barrier.h>
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| /linux-master/arch/sparc/include/asm/ |
| H A D | vvar.h | 10 #include <asm/barrier.h>
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| /linux-master/arch/csky/abiv2/inc/abi/ |
| H A D | ckmmu.h | 7 #include <asm/barrier.h>
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| /linux-master/include/asm-generic/ |
| H A D | bitops.h | 16 #include <asm/barrier.h>
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| /linux-master/arch/openrisc/include/asm/ |
| H A D | bitops.h | 26 #include <asm/barrier.h>
|
| H A D | processor.h | 78 #define cpu_relax() barrier()
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| /linux-master/arch/csky/include/asm/ |
| H A D | bitops.h | 7 #include <asm/barrier.h>
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| /linux-master/tools/include/asm/ |
| H A D | barrier.h | 4 #include "../../arch/x86/include/asm/barrier.h"
6 #include "../../arch/arm/include/asm/barrier.h"
8 #include "../../arch/arm64/include/asm/barrier.h"
10 #include "../../arch/powerpc/include/asm/barrier.h"
12 #include "../../arch/s390/include/asm/barrier.h"
14 #include "../../arch/sh/include/asm/barrier.h"
16 #include "../../arch/sparc/include/asm/barrier.h"
18 #include "../../arch/tile/include/asm/barrier.h"
20 #include "../../arch/alpha/include/asm/barrier.h"
22 #include "../../arch/mips/include/asm/barrier
[all...] |
| /linux-master/arch/loongarch/include/asm/ |
| H A D | bitops.h | 14 #include <asm/barrier.h>
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| /linux-master/arch/nios2/include/asm/ |
| H A D | processor.h | 73 #define cpu_relax() barrier()
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| /linux-master/arch/powerpc/platforms/embedded6xx/ |
| H A D | usbgecko_udbg.c | 64 barrier();
118 barrier();
156 barrier();
181 barrier();
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| /linux-master/drivers/soc/qcom/ |
| H A D | kryo-l2-accessors.c | 7 #include <asm/barrier.h>
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| /linux-master/include/asm-generic/bitops/ |
| H A D | lock.h | 7 #include <asm/barrier.h>
14 * This operation is atomic and provides acquire barrier semantics if
38 * This operation is atomic and provides release barrier semantics.
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| /linux-master/arch/um/include/shared/ |
| H A D | user.h | 58 #define barrier() __asm__ __volatile__("": : :"memory") macro
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| /linux-master/arch/riscv/include/asm/ |
| H A D | barrier.h | 3 * Based on arch/arm/include/asm/barrier.h
47 * This is a very specific barrier: it's currently only used in two places in
50 * mandates a barrier on RISC-V. The sequence looks like:
73 #include <asm-generic/barrier.h>
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| /linux-master/arch/powerpc/boot/ |
| H A D | ugecon.c | 56 barrier();
83 barrier();
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| /linux-master/arch/mips/include/asm/ |
| H A D | bmips.h | 97 barrier();
123 barrier();
|