Searched refs:val (Results 51 - 75 of 10961) sorted by relevance

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/linux-master/tools/include/linux/
H A Dhash.h16 #define hash_long(val, bits) hash_32(val, bits)
18 #define hash_long(val, bits) hash_64(val, bits)
60 static inline u32 __hash_32_generic(u32 val) argument
62 return val * GOLDEN_RATIO_32;
65 static inline u32 hash_32(u32 val, unsigned int bits) argument
68 return __hash_32(val) >> (32 - bits);
74 static __always_inline u32 hash_64_generic(u64 val, unsigned int bits) argument
78 return val * GOLDEN_RATIO_6
93 unsigned long val = (unsigned long)ptr; local
[all...]
H A Drefcount.h78 unsigned int old, new, val = atomic_read(&r->refs); local
81 new = val + 1;
83 if (!val)
89 old = atomic_cmpxchg_relaxed(&r->refs, val, new);
90 if (old == val)
93 val = old;
123 unsigned int old, new, val = atomic_read(&r->refs); local
126 if (unlikely(val == UINT_MAX))
129 new = val - i;
130 if (new > val) {
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/linux-master/include/linux/
H A Dhash.h16 #define hash_long(val, bits) hash_32(val, bits)
18 #define hash_long(val, bits) hash_64(val, bits)
60 static inline u32 __hash_32_generic(u32 val) argument
62 return val * GOLDEN_RATIO_32;
65 static inline u32 hash_32(u32 val, unsigned int bits) argument
68 return __hash_32(val) >> (32 - bits);
74 static __always_inline u32 hash_64_generic(u64 val, unsigned int bits) argument
78 return val * GOLDEN_RATIO_6
93 unsigned long val = (unsigned long)ptr; local
[all...]
/linux-master/tools/testing/selftests/arm64/pauth/
H A Dexec_target.c14 size_t val; local
16 fread(&val, sizeof(size_t), 1, stdin);
24 signed_vals.keyia = keyia_sign(val);
25 signed_vals.keyib = keyib_sign(val);
26 signed_vals.keyda = keyda_sign(val);
27 signed_vals.keydb = keydb_sign(val);
29 signed_vals.keyg = (hwcaps & HWCAP_PACG) ? keyg_sign(val) : 0;
H A Dhelper.h22 size_t keyia_sign(size_t val);
23 size_t keyib_sign(size_t val);
24 size_t keyda_sign(size_t val);
25 size_t keydb_sign(size_t val);
26 size_t keyg_sign(size_t val);
/linux-master/sound/pci/ac97/
H A Dac97_proc.c95 unsigned short val, tmp, ext, mext; local
115 val = snd_ac97_read(ac97, AC97_INT_PAGING);
126 AC97_PAGE_MASK, val & AC97_PAGE_MASK);
129 // val = snd_ac97_read(ac97, AC97_RESET);
130 val = ac97->caps;
132 val & AC97_BC_DEDICATED_MIC ? " -dedicated MIC PCM IN channel-" : "",
133 val & AC97_BC_RESERVED1 ? " -reserved1-" : "",
134 val & AC97_BC_BASS_TREBLE ? " -bass & treble-" : "",
135 val & AC97_BC_SIM_STEREO ? " -simulated stereo-" : "",
136 val
367 unsigned int reg, val; local
382 int reg, val; local
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/linux-master/tools/testing/selftests/powerpc/pmu/ebb/
H A Dreg_access_test.c18 uint64_t val, expected; local
24 val = mfspr(SPRN_BESCR);
26 FAIL_IF(val != expected);
30 val = mfspr(SPRN_EBBHR);
32 FAIL_IF(val != expected);
/linux-master/tools/testing/selftests/futex/include/
H A Datomic.h22 volatile int val; member in struct:__anon1868
33 * Return the old value of addr->val.
38 return __sync_val_compare_and_swap(&addr->val, oldval, newval);
45 * Return the new value of addr->val.
50 return __sync_add_and_fetch(&addr->val, 1);
57 * Return the new value of addr-val.
62 return __sync_sub_and_fetch(&addr->val, 1);
70 * Return the new value of addr->val.
75 addr->val = newval;
/linux-master/drivers/hwtracing/coresight/
H A Dcoresight-etm4x.h248 #define WRITE_ETM4x_REG(val, reg) \
249 write_sysreg_s(val, ETM4x_REG_NUM_TO_SYSREG((reg)))
254 #define write_etm4x_sysreg_const_offset(val, offset) \
255 WRITE_ETM4x_REG(val, ETM4x_OFFSET_TO_REG(offset))
260 #define CASE_WRITE(val, x) \
261 case (x): { write_etm4x_sysreg_const_offset((val), (x)); break; }
266 #define ETE_ONLY_SYSREG_LIST(op, val) \
267 CASE_##op((val), TRCRSR) \
268 CASE_##op((val), TRCEXTINSELRn(1)) \
269 CASE_##op((val), TRCEXTINSELR
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/linux-master/tools/include/tools/
H A Dbe_byteshift.h23 static inline void __put_unaligned_be16(uint16_t val, uint8_t *p) argument
25 *p++ = val >> 8;
26 *p++ = val;
29 static inline void __put_unaligned_be32(uint32_t val, uint8_t *p) argument
31 __put_unaligned_be16(val >> 16, p);
32 __put_unaligned_be16(val, p + 2);
35 static inline void __put_unaligned_be64(uint64_t val, uint8_t *p) argument
37 __put_unaligned_be32(val >> 32, p);
38 __put_unaligned_be32(val, p + 4);
56 static inline void put_unaligned_be16(uint16_t val, voi argument
61 put_unaligned_be32(uint32_t val, void *p) argument
66 put_unaligned_be64(uint64_t val, void *p) argument
[all...]
H A Dle_byteshift.h23 static inline void __put_unaligned_le16(uint16_t val, uint8_t *p) argument
25 *p++ = val;
26 *p++ = val >> 8;
29 static inline void __put_unaligned_le32(uint32_t val, uint8_t *p) argument
31 __put_unaligned_le16(val >> 16, p + 2);
32 __put_unaligned_le16(val, p);
35 static inline void __put_unaligned_le64(uint64_t val, uint8_t *p) argument
37 __put_unaligned_le32(val >> 32, p + 4);
38 __put_unaligned_le32(val, p);
56 static inline void put_unaligned_le16(uint16_t val, voi argument
61 put_unaligned_le32(uint32_t val, void *p) argument
66 put_unaligned_le64(uint64_t val, void *p) argument
[all...]
/linux-master/net/sched/
H A Dem_cmp.c26 u32 val = 0; local
33 val = *ptr;
37 val = get_unaligned_be16(ptr);
40 val = be16_to_cpu(val);
47 val = get_unaligned_be32(ptr);
50 val = be32_to_cpu(val);
58 val &= cmp->mask;
62 return val
[all...]
/linux-master/arch/mips/bcm63xx/
H A Dcs.c38 u32 val; local
50 val = (base & MPI_CSBASE_BASE_MASK);
52 val |= (ilog2(size) - ilog2(8 * 1024)) << MPI_CSBASE_SIZE_SHIFT;
55 bcm_mpi_writel(val, MPI_CSBASE_REG(cs));
70 u32 val; local
76 val = bcm_mpi_readl(MPI_CSCTL_REG(cs));
77 val &= ~(MPI_CSCTL_WAIT_MASK);
78 val &= ~(MPI_CSCTL_SETUP_MASK);
79 val &= ~(MPI_CSCTL_HOLD_MASK);
80 val |
97 u32 val; local
129 u32 val; local
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/linux-master/drivers/media/pci/cx18/
H A Dcx18-io.c13 void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count) argument
16 u16 val2 = val | (val << 8);
21 cx18_writeb(cx, (u8) val, dst);
41 cx18_writeb(cx, (u8) val, dst);
44 void cx18_sw1_irq_enable(struct cx18 *cx, u32 val) argument
46 cx18_write_reg_expect(cx, val, SW1_INT_STATUS, ~val, val);
47 cx->sw1_irq_mask = cx18_read_reg(cx, SW1_INT_ENABLE_PCI) | val;
51 cx18_sw1_irq_disable(struct cx18 *cx, u32 val) argument
57 cx18_sw2_irq_enable(struct cx18 *cx, u32 val) argument
64 cx18_sw2_irq_disable(struct cx18 *cx, u32 val) argument
70 cx18_sw2_irq_disable_cpu(struct cx18 *cx, u32 val) argument
79 u32 val; local
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H A Dcx18-io.h30 void cx18_raw_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr) argument
32 __raw_writel(val, addr);
35 static inline void cx18_raw_writel(struct cx18 *cx, u32 val, void __iomem *addr) argument
39 cx18_raw_writel_noretry(cx, val, addr);
40 if (val == cx18_raw_readl(cx, addr))
52 void cx18_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr) argument
54 writel(val, addr);
57 static inline void cx18_writel(struct cx18 *cx, u32 val, void __iomem *addr) argument
61 cx18_writel_noretry(cx, val, addr);
62 if (val
68 cx18_writel_expect(struct cx18 *cx, u32 val, void __iomem *addr, u32 eval, u32 mask) argument
90 cx18_writew_noretry(struct cx18 *cx, u16 val, void __iomem *addr) argument
95 cx18_writew(struct cx18 *cx, u16 val, void __iomem *addr) argument
111 cx18_writeb_noretry(struct cx18 *cx, u8 val, void __iomem *addr) argument
116 cx18_writeb(struct cx18 *cx, u8 val, void __iomem *addr) argument
137 cx18_write_reg_noretry(struct cx18 *cx, u32 val, u32 reg) argument
142 cx18_write_reg(struct cx18 *cx, u32 val, u32 reg) argument
147 cx18_write_reg_expect(struct cx18 *cx, u32 val, u32 reg, u32 eval, u32 mask) argument
160 cx18_write_enc(struct cx18 *cx, u32 val, u32 addr) argument
[all...]
/linux-master/sound/synth/emux/
H A Demux_nrpn.c19 int (*convert)(int val);
41 int type, int val, int mode)
46 cval = table[i].convert(val);
86 static int fx_delay(int val);
87 static int fx_attack(int val);
88 static int fx_hold(int val);
89 static int fx_decay(int val);
90 static int fx_the_value(int val);
91 static int fx_twice_value(int val);
92 static int fx_conv_pitch(int val);
37 send_converted_effect(const struct nrpn_conv_table *table, int num_tables, struct snd_emux_port *port, struct snd_midi_channel *chan, int type, int val, int mode) argument
128 fx_delay(int val) argument
133 fx_attack(int val) argument
138 fx_hold(int val) argument
143 fx_decay(int val) argument
148 fx_the_value(int val) argument
153 fx_twice_value(int val) argument
158 fx_conv_pitch(int val) argument
163 fx_conv_Q(int val) argument
209 gs_cutoff(int val) argument
215 gs_filterQ(int val) argument
221 gs_attack(int val) argument
227 gs_decay(int val) argument
233 gs_release(int val) argument
239 gs_vib_rate(int val) argument
245 gs_vib_depth(int val) argument
251 gs_vib_delay(int val) argument
284 int val; local
299 int val; local
317 xg_cutoff(int val) argument
323 xg_filterQ(int val) argument
329 xg_attack(int val) argument
335 xg_release(int val) argument
[all...]
/linux-master/include/asm-generic/
H A Dunaligned.h17 #define __put_unaligned_t(type, val, ptr) do { \
19 __pptr->x = (val); \
23 #define put_unaligned(val, ptr) __put_unaligned_t(typeof(*(ptr)), (val), (ptr))
40 static inline void put_unaligned_le16(u16 val, void *p) argument
42 __put_unaligned_t(__le16, cpu_to_le16(val), p);
45 static inline void put_unaligned_le32(u32 val, void *p) argument
47 __put_unaligned_t(__le32, cpu_to_le32(val), p);
50 static inline void put_unaligned_le64(u64 val, void *p) argument
52 __put_unaligned_t(__le64, cpu_to_le64(val),
70 put_unaligned_be16(u16 val, void *p) argument
75 put_unaligned_be32(u32 val, void *p) argument
80 put_unaligned_be64(u64 val, void *p) argument
105 __put_unaligned_be24(const u32 val, u8 *p) argument
112 put_unaligned_be24(const u32 val, void *p) argument
117 __put_unaligned_le24(const u32 val, u8 *p) argument
124 put_unaligned_le24(const u32 val, void *p) argument
129 __put_unaligned_be48(const u64 val, u8 *p) argument
139 put_unaligned_be48(const u64 val, void *p) argument
[all...]
/linux-master/tools/include/asm-generic/
H A Dunaligned.h18 #define __put_unaligned_t(type, val, ptr) do { \
20 __pptr->x = (val); \
24 #define put_unaligned(val, ptr) __put_unaligned_t(typeof(*(ptr)), (val), (ptr))
41 static inline void put_unaligned_le16(u16 val, void *p) argument
43 __put_unaligned_t(__le16, cpu_to_le16(val), p);
46 static inline void put_unaligned_le32(u32 val, void *p) argument
48 __put_unaligned_t(__le32, cpu_to_le32(val), p);
51 static inline void put_unaligned_le64(u64 val, void *p) argument
53 __put_unaligned_t(__le64, cpu_to_le64(val),
71 put_unaligned_be16(u16 val, void *p) argument
76 put_unaligned_be32(u32 val, void *p) argument
81 put_unaligned_be64(u64 val, void *p) argument
106 __put_unaligned_be24(const u32 val, u8 *p) argument
113 put_unaligned_be24(const u32 val, void *p) argument
118 __put_unaligned_le24(const u32 val, u8 *p) argument
125 put_unaligned_le24(const u32 val, void *p) argument
130 __put_unaligned_be48(const u64 val, u8 *p) argument
140 put_unaligned_be48(const u64 val, void *p) argument
[all...]
/linux-master/drivers/gpu/drm/msm/adreno/
H A Da3xx.xml.h949 static inline uint32_t A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES(uint32_t val) argument
951 return ((val) << A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES__SHIFT) & A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES__MASK;
957 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val) argument
959 return ((val) << A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT) & A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK;
963 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val) argument
965 return ((val) << A3XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT) & A3XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK;
971 static inline uint32_t A3XX_GRAS_CL_VPORT_XOFFSET(float val) argument
973 return ((fui(val)) << A3XX_GRAS_CL_VPORT_XOFFSET__SHIFT) & A3XX_GRAS_CL_VPORT_XOFFSET__MASK;
979 static inline uint32_t A3XX_GRAS_CL_VPORT_XSCALE(float val) argument
981 return ((fui(val)) << A3XX_GRAS_CL_VPORT_XSCALE__SHIF
987 A3XX_GRAS_CL_VPORT_YOFFSET(float val) argument
995 A3XX_GRAS_CL_VPORT_YSCALE(float val) argument
1003 A3XX_GRAS_CL_VPORT_ZOFFSET(float val) argument
1011 A3XX_GRAS_CL_VPORT_ZSCALE(float val) argument
1019 A3XX_GRAS_SU_POINT_MINMAX_MIN(float val) argument
1025 A3XX_GRAS_SU_POINT_MINMAX_MAX(float val) argument
1033 A3XX_GRAS_SU_POINT_SIZE(float val) argument
1041 A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL(float val) argument
1049 A3XX_GRAS_SU_POLY_OFFSET_OFFSET(float val) argument
1060 A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(float val) argument
1069 A3XX_GRAS_SC_CONTROL_RENDER_MODE(enum a3xx_render_mode val) argument
1075 A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES(enum a3xx_msaa_samples val) argument
1081 A3XX_GRAS_SC_CONTROL_RASTER_MODE(uint32_t val) argument
1090 A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X(uint32_t val) argument
1096 A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(uint32_t val) argument
1105 A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X(uint32_t val) argument
1111 A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(uint32_t val) argument
1120 A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val) argument
1126 A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val) argument
1135 A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val) argument
1141 A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val) argument
1150 A3XX_RB_MODE_CONTROL_RENDER_MODE(enum a3xx_render_mode val) argument
1156 A3XX_RB_MODE_CONTROL_MRT(uint32_t val) argument
1170 A3XX_RB_RENDER_CONTROL_BIN_WIDTH(uint32_t val) argument
1179 A3XX_RB_RENDER_CONTROL_COORD_MASK(uint32_t val) argument
1188 A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val) argument
1199 A3XX_RB_MSAA_CONTROL_SAMPLES(enum a3xx_msaa_samples val) argument
1205 A3XX_RB_MSAA_CONTROL_SAMPLE_MASK(uint32_t val) argument
1213 A3XX_RB_ALPHA_REF_UINT(uint32_t val) argument
1219 A3XX_RB_ALPHA_REF_FLOAT(float val) argument
1232 A3XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val) argument
1238 A3XX_RB_MRT_CONTROL_DITHER_MODE(enum adreno_rb_dither_mode val) argument
1244 A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val) argument
1252 A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a3xx_color_fmt val) argument
1258 A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a3xx_tile_mode val) argument
1264 A3XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val) argument
1271 A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val) argument
1280 A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(uint32_t val) argument
1289 A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val) argument
1295 A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) argument
1301 A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val) argument
1307 A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val) argument
1313 A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) argument
1319 A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val) argument
1328 A3XX_RB_BLEND_RED_UINT(uint32_t val) argument
1334 A3XX_RB_BLEND_RED_FLOAT(float val) argument
1342 A3XX_RB_BLEND_GREEN_UINT(uint32_t val) argument
1348 A3XX_RB_BLEND_GREEN_FLOAT(float val) argument
1356 A3XX_RB_BLEND_BLUE_UINT(uint32_t val) argument
1362 A3XX_RB_BLEND_BLUE_FLOAT(float val) argument
1370 A3XX_RB_BLEND_ALPHA_UINT(uint32_t val) argument
1376 A3XX_RB_BLEND_ALPHA_FLOAT(float val) argument
1392 A3XX_RB_COPY_CONTROL_MSAA_RESOLVE(enum a3xx_msaa_samples val) argument
1399 A3XX_RB_COPY_CONTROL_MODE(enum adreno_rb_copy_control_mode val) argument
1406 A3XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val) argument
1413 A3XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val) argument
1422 A3XX_RB_COPY_DEST_BASE_BASE(uint32_t val) argument
1431 A3XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val) argument
1440 A3XX_RB_COPY_DEST_INFO_TILE(enum a3xx_tile_mode val) argument
1446 A3XX_RB_COPY_DEST_INFO_FORMAT(enum a3xx_color_fmt val) argument
1452 A3XX_RB_COPY_DEST_INFO_SWAP(enum a3xx_color_swap val) argument
1458 A3XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val) argument
1464 A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(uint32_t val) argument
1470 A3XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endian val) argument
1482 A3XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val) argument
1494 A3XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum adreno_rb_depth_format val) argument
1500 A3XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val) argument
1509 A3XX_RB_DEPTH_PITCH(uint32_t val) argument
1521 A3XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val) argument
1527 A3XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val) argument
1533 A3XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val) argument
1539 A3XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val) argument
1545 A3XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val) argument
1551 A3XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val) argument
1557 A3XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val) argument
1563 A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val) argument
1573 A3XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val) argument
1582 A3XX_RB_STENCIL_PITCH(uint32_t val) argument
1591 A3XX_RB_STENCILREFMASK_STENCILREF(uint32_t val) argument
1597 A3XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val) argument
1603 A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val) argument
1611 A3XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val) argument
1617 A3XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val) argument
1623 A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val) argument
1634 A3XX_RB_WINDOW_OFFSET_X(uint32_t val) argument
1640 A3XX_RB_WINDOW_OFFSET_Y(uint32_t val) argument
1662 A3XX_PC_VSTREAM_CONTROL_SIZE(uint32_t val) argument
1668 A3XX_PC_VSTREAM_CONTROL_N(uint32_t val) argument
1678 A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC(uint32_t val) argument
1684 A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val) argument
1690 A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val) argument
1704 A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val) argument
1714 A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC(uint32_t val) argument
1722 A3XX_HLSQ_CONTROL_0_REG_CONSTMODE(uint32_t val) argument
1734 A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(enum a3xx_threadsize val) argument
1741 A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID(uint32_t val) argument
1747 A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID(uint32_t val) argument
1755 A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID(uint32_t val) argument
1761 A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID(uint32_t val) argument
1767 A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(uint32_t val) argument
1775 A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTERREGID(uint32_t val) argument
1781 A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTERREGID(uint32_t val) argument
1787 A3XX_HLSQ_CONTROL_3_REG_IJPERSPCENTROIDREGID(uint32_t val) argument
1793 A3XX_HLSQ_CONTROL_3_REG_IJNONPERSPCENTROIDREGID(uint32_t val) argument
1801 A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(uint32_t val) argument
1807 A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET(uint32_t val) argument
1813 A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(uint32_t val) argument
1821 A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(uint32_t val) argument
1827 A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET(uint32_t val) argument
1833 A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(uint32_t val) argument
1841 A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY(uint32_t val) argument
1847 A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY(uint32_t val) argument
1855 A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY(uint32_t val) argument
1861 A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY(uint32_t val) argument
1869 A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM(uint32_t val) argument
1875 A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0(uint32_t val) argument
1881 A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1(uint32_t val) argument
1887 A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2(uint32_t val) argument
1917 A3XX_VFD_CONTROL_0_TOTALATTRTOVS(uint32_t val) argument
1923 A3XX_VFD_CONTROL_0_PACKETSIZE(uint32_t val) argument
1929 A3XX_VFD_CONTROL_0_STRMDECINSTRCNT(uint32_t val) argument
1935 A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(uint32_t val) argument
1943 A3XX_VFD_CONTROL_1_MAXSTORAGE(uint32_t val) argument
1949 A3XX_VFD_CONTROL_1_MAXTHRESHOLD(uint32_t val) argument
1955 A3XX_VFD_CONTROL_1_MINTHRESHOLD(uint32_t val) argument
1961 A3XX_VFD_CONTROL_1_REGID4VTX(uint32_t val) argument
1967 A3XX_VFD_CONTROL_1_REGID4INST(uint32_t val) argument
1985 A3XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val) argument
1991 A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val) argument
1999 A3XX_VFD_FETCH_INSTR_0_INDEXCODE(uint32_t val) argument
2005 A3XX_VFD_FETCH_INSTR_0_STEPRATE(uint32_t val) argument
2017 A3XX_VFD_DECODE_INSTR_WRITEMASK(uint32_t val) argument
2024 A3XX_VFD_DECODE_INSTR_FORMAT(enum a3xx_vtx_fmt val) argument
2030 A3XX_VFD_DECODE_INSTR_REGID(uint32_t val) argument
2037 A3XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val) argument
2043 A3XX_VFD_DECODE_INSTR_SHIFTCNT(uint32_t val) argument
2053 A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD(uint32_t val) argument
2059 A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT(uint32_t val) argument
2067 A3XX_VPC_ATTR_TOTALATTR(uint32_t val) argument
2074 A3XX_VPC_ATTR_THRDASSIGN(uint32_t val) argument
2080 A3XX_VPC_ATTR_LMSIZE(uint32_t val) argument
2088 A3XX_VPC_PACK_NUMFPNONPOSVAR(uint32_t val) argument
2094 A3XX_VPC_PACK_NUMNONPOSVSVAR(uint32_t val) argument
2104 A3XX_VPC_VARYING_INTERP_MODE_C0(enum a3xx_intp_mode val) argument
2110 A3XX_VPC_VARYING_INTERP_MODE_C1(enum a3xx_intp_mode val) argument
2116 A3XX_VPC_VARYING_INTERP_MODE_C2(enum a3xx_intp_mode val) argument
2122 A3XX_VPC_VARYING_INTERP_MODE_C3(enum a3xx_intp_mode val) argument
2128 A3XX_VPC_VARYING_INTERP_MODE_C4(enum a3xx_intp_mode val) argument
2134 A3XX_VPC_VARYING_INTERP_MODE_C5(enum a3xx_intp_mode val) argument
2140 A3XX_VPC_VARYING_INTERP_MODE_C6(enum a3xx_intp_mode val) argument
2146 A3XX_VPC_VARYING_INTERP_MODE_C7(enum a3xx_intp_mode val) argument
2152 A3XX_VPC_VARYING_INTERP_MODE_C8(enum a3xx_intp_mode val) argument
2158 A3XX_VPC_VARYING_INTERP_MODE_C9(enum a3xx_intp_mode val) argument
2164 A3XX_VPC_VARYING_INTERP_MODE_CA(enum a3xx_intp_mode val) argument
2170 A3XX_VPC_VARYING_INTERP_MODE_CB(enum a3xx_intp_mode val) argument
2176 A3XX_VPC_VARYING_INTERP_MODE_CC(enum a3xx_intp_mode val) argument
2182 A3XX_VPC_VARYING_INTERP_MODE_CD(enum a3xx_intp_mode val) argument
2188 A3XX_VPC_VARYING_INTERP_MODE_CE(enum a3xx_intp_mode val) argument
2194 A3XX_VPC_VARYING_INTERP_MODE_CF(enum a3xx_intp_mode val) argument
2204 A3XX_VPC_VARYING_PS_REPL_MODE_C0(enum a3xx_repl_mode val) argument
2210 A3XX_VPC_VARYING_PS_REPL_MODE_C1(enum a3xx_repl_mode val) argument
2216 A3XX_VPC_VARYING_PS_REPL_MODE_C2(enum a3xx_repl_mode val) argument
2222 A3XX_VPC_VARYING_PS_REPL_MODE_C3(enum a3xx_repl_mode val) argument
2228 A3XX_VPC_VARYING_PS_REPL_MODE_C4(enum a3xx_repl_mode val) argument
2234 A3XX_VPC_VARYING_PS_REPL_MODE_C5(enum a3xx_repl_mode val) argument
2240 A3XX_VPC_VARYING_PS_REPL_MODE_C6(enum a3xx_repl_mode val) argument
2246 A3XX_VPC_VARYING_PS_REPL_MODE_C7(enum a3xx_repl_mode val) argument
2252 A3XX_VPC_VARYING_PS_REPL_MODE_C8(enum a3xx_repl_mode val) argument
2258 A3XX_VPC_VARYING_PS_REPL_MODE_C9(enum a3xx_repl_mode val) argument
2264 A3XX_VPC_VARYING_PS_REPL_MODE_CA(enum a3xx_repl_mode val) argument
2270 A3XX_VPC_VARYING_PS_REPL_MODE_CB(enum a3xx_repl_mode val) argument
2276 A3XX_VPC_VARYING_PS_REPL_MODE_CC(enum a3xx_repl_mode val) argument
2282 A3XX_VPC_VARYING_PS_REPL_MODE_CD(enum a3xx_repl_mode val) argument
2288 A3XX_VPC_VARYING_PS_REPL_MODE_CE(enum a3xx_repl_mode val) argument
2294 A3XX_VPC_VARYING_PS_REPL_MODE_CF(enum a3xx_repl_mode val) argument
2307 A3XX_SP_SP_CTRL_REG_CONSTMODE(uint32_t val) argument
2314 A3XX_SP_SP_CTRL_REG_SLEEPMODE(uint32_t val) argument
2320 A3XX_SP_SP_CTRL_REG_L0MODE(uint32_t val) argument
2328 A3XX_SP_VS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val) argument
2334 A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE(enum a3xx_instrbuffermode val) argument
2342 A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) argument
2348 A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) argument
2354 A3XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) argument
2361 A3XX_SP_VS_CTRL_REG0_LENGTH(uint32_t val) argument
2369 A3XX_SP_VS_CTRL_REG1_CONSTLENGTH(uint32_t val) argument
2375 A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT(uint32_t val) argument
2381 A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val) argument
2389 A3XX_SP_VS_PARAM_REG_POSREGID(uint32_t val) argument
2395 A3XX_SP_VS_PARAM_REG_PSIZEREGID(uint32_t val) argument
2402 A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(uint32_t val) argument
2412 A3XX_SP_VS_OUT_REG_A_REGID(uint32_t val) argument
2419 A3XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val) argument
2425 A3XX_SP_VS_OUT_REG_B_REGID(uint32_t val) argument
2432 A3XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val) argument
2442 A3XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val) argument
2448 A3XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val) argument
2454 A3XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val) argument
2460 A3XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val) argument
2468 A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET(uint32_t val) argument
2474 A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val) argument
2480 A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val) argument
2490 A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM(uint32_t val) argument
2497 A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET(uint32_t val) argument
2503 A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD(uint32_t val) argument
2511 A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN(uint32_t val) argument
2517 A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS(uint32_t val) argument
2528 A3XX_SP_VS_LENGTH_REG_SHADERLENGTH(uint32_t val) argument
2536 A3XX_SP_FS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val) argument
2542 A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE(enum a3xx_instrbuffermode val) argument
2550 A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) argument
2556 A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) argument
2565 A3XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) argument
2574 A3XX_SP_FS_CTRL_REG0_LENGTH(uint32_t val) argument
2582 A3XX_SP_FS_CTRL_REG1_CONSTLENGTH(uint32_t val) argument
2588 A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT(uint32_t val) argument
2594 A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val) argument
2600 A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET(uint32_t val) argument
2608 A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET(uint32_t val) argument
2614 A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val) argument
2620 A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val) argument
2630 A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM(uint32_t val) argument
2636 A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET(uint32_t val) argument
2642 A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD(uint32_t val) argument
2650 A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN(uint32_t val) argument
2656 A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS(uint32_t val) argument
2671 A3XX_SP_FS_OUTPUT_REG_MRT(uint32_t val) argument
2678 A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID(uint32_t val) argument
2688 A3XX_SP_FS_MRT_REG_REGID(uint32_t val) argument
2701 A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT(enum a3xx_color_fmt val) argument
2709 A3XX_SP_FS_LENGTH_REG_SHADERLENGTH(uint32_t val) argument
2719 A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET(uint32_t val) argument
2725 A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET(uint32_t val) argument
2731 A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR(uint32_t val) argument
2741 A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET(uint32_t val) argument
2747 A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET(uint32_t val) argument
2753 A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR(uint32_t val) argument
2837 A3XX_VSC_BIN_SIZE_WIDTH(uint32_t val) argument
2844 A3XX_VSC_BIN_SIZE_HEIGHT(uint32_t val) argument
2857 A3XX_VSC_PIPE_CONFIG_X(uint32_t val) argument
2863 A3XX_VSC_PIPE_CONFIG_Y(uint32_t val) argument
2869 A3XX_VSC_PIPE_CONFIG_W(uint32_t val) argument
2875 A3XX_VSC_PIPE_CONFIG_H(uint32_t val) argument
2928 A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val) argument
2934 A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val) argument
2982 A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR(uint32_t val) argument
2990 A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR(uint32_t val) argument
2996 A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE(enum a3xx_cache_opcode val) argument
3043 A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE(enum pc_di_primtype val) argument
3049 A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT(enum pc_di_src_sel val) argument
3055 A3XX_VGT_DRAW_INITIATOR_VIS_CULL(enum pc_di_vis_cull_mode val) argument
3061 A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE(enum pc_di_index_size val) argument
3070 A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES(uint32_t val) argument
3082 A3XX_TEX_SAMP_0_XY_MAG(enum a3xx_tex_filter val) argument
3088 A3XX_TEX_SAMP_0_XY_MIN(enum a3xx_tex_filter val) argument
3094 A3XX_TEX_SAMP_0_WRAP_S(enum a3xx_tex_clamp val) argument
3100 A3XX_TEX_SAMP_0_WRAP_T(enum a3xx_tex_clamp val) argument
3106 A3XX_TEX_SAMP_0_WRAP_R(enum a3xx_tex_clamp val) argument
3112 A3XX_TEX_SAMP_0_ANISO(enum a3xx_tex_aniso val) argument
3118 A3XX_TEX_SAMP_0_COMPARE_FUNC(enum adreno_compare_func val) argument
3128 A3XX_TEX_SAMP_1_LOD_BIAS(float val) argument
3134 A3XX_TEX_SAMP_1_MAX_LOD(float val) argument
3140 A3XX_TEX_SAMP_1_MIN_LOD(float val) argument
3148 A3XX_TEX_CONST_0_TILE_MODE(enum a3xx_tile_mode val) argument
3155 A3XX_TEX_CONST_0_SWIZ_X(enum a3xx_tex_swiz val) argument
3161 A3XX_TEX_CONST_0_SWIZ_Y(enum a3xx_tex_swiz val) argument
3167 A3XX_TEX_CONST_0_SWIZ_Z(enum a3xx_tex_swiz val) argument
3173 A3XX_TEX_CONST_0_SWIZ_W(enum a3xx_tex_swiz val) argument
3179 A3XX_TEX_CONST_0_MIPLVLS(uint32_t val) argument
3185 A3XX_TEX_CONST_0_MSAATEX(enum a3xx_tex_msaa val) argument
3191 A3XX_TEX_CONST_0_FMT(enum a3xx_tex_fmt val) argument
3198 A3XX_TEX_CONST_0_TYPE(enum a3xx_tex_type val) argument
3206 A3XX_TEX_CONST_1_HEIGHT(uint32_t val) argument
3212 A3XX_TEX_CONST_1_WIDTH(uint32_t val) argument
3218 A3XX_TEX_CONST_1_PITCHALIGN(uint32_t val) argument
3226 A3XX_TEX_CONST_2_INDX(uint32_t val) argument
3232 A3XX_TEX_CONST_2_PITCH(uint32_t val) argument
3238 A3XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val) argument
3246 A3XX_TEX_CONST_3_LAYERSZ1(uint32_t val) argument
3253 A3XX_TEX_CONST_3_DEPTH(uint32_t val) argument
3259 A3XX_TEX_CONST_3_LAYERSZ2(uint32_t val) argument
[all...]
/linux-master/arch/arm/common/
H A DbL_switcher_dummy_if.c21 unsigned char val[3]; local
30 if (copy_from_user(val, buf, 3))
34 if (val[0] < '0' || val[0] > '9' ||
35 val[1] != ',' ||
36 val[2] < '0' || val[2] > '1')
39 cpu = val[0] - '0';
40 cluster = val[2] - '0';
/linux-master/drivers/net/ethernet/qlogic/qed/
H A Dqed_init_ops.h63 * @val: Val.
69 u32 val);
71 #define STORE_RT_REG(hwfn, offset, val) \
72 qed_init_store_rt_reg(hwfn, offset, val)
74 #define OVERWRITE_RT_REG(hwfn, offset, val) \
75 qed_init_store_rt_reg(hwfn, offset, val)
79 u32 *val,
82 #define STORE_RT_REG_AGG(hwfn, offset, val) \
83 qed_init_store_rt_agg(hwfn, offset, (u32 *)&(val), sizeof(val))
[all...]
/linux-master/tools/testing/selftests/bpf/progs/
H A Dtest_xdp_update_frags.c18 __u8 val[16] = {}; local
26 err = bpf_xdp_load_bytes(xdp, offset, val, sizeof(val));
30 if (val[0] != 0xaa || val[15] != 0xaa) /* marker */
33 val[0] = 0xbb; /* update the marker */
34 val[15] = 0xbb;
35 err = bpf_xdp_store_bytes(xdp, offset, val, sizeof(val));
H A Dperf_event_stackmap.c35 long val; local
37 val = bpf_get_stackid(ctx, &stackmap, 0);
38 if (val >= 0)
40 val = bpf_get_stackid(ctx, &stackmap, BPF_F_USER_STACK);
41 if (val >= 0)
48 val = bpf_get_stack(ctx, trace, sizeof(stack_trace_t), 0);
49 if (val > 0)
52 val = bpf_get_stack(ctx, trace, sizeof(stack_trace_t), BPF_F_USER_STACK);
53 if (val > 0)
/linux-master/tools/testing/selftests/powerpc/ptrace/
H A Dptrace-gpr.h21 int validate_gpr(unsigned long *gpr, unsigned long val) argument
26 if (gpr[i] != val) {
28 i+14, gpr[i], val);
39 int validate_fpr(__u64 *fpr, __u64 val) argument
44 if (fpr[i] != val) {
45 printf("FPR[%d]: %llx Expected: %llx\n", i, fpr[i], val);
56 int validate_fpr_double(double *fpr, double val) argument
61 if (fpr[i] != val) {
62 printf("FPR[%d]: %f Expected: %f\n", i, fpr[i], val);
/linux-master/tools/testing/selftests/powerpc/dscr/
H A Ddscr.h48 inline void set_dscr(unsigned long val) argument
50 mtspr(SPRN_DSCR_PRIV, val);
59 inline void set_dscr_usr(unsigned long val) argument
61 mtspr(SPRN_DSCR, val);
68 unsigned long val; local
70 err = read_ulong(DSCR_DEFAULT, &val, 16);
75 return val;
78 void set_default_dscr(unsigned long val) argument
82 err = write_ulong(DSCR_DEFAULT, val, 16);

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