Searched refs:t0 (Results 51 - 75 of 233) sorted by relevance

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/linux-master/arch/mips/kernel/
H A Docteon_switch.S33 dmfc0 t0, $11,7 /* CvmMemCtl */
34 bbit0 t0, 6, 3f /* Is user access enabled? */
38 andi t0, 0x3f
40 sll t0, 7-LONGLOG-1
47 subu t0, 1 /* Decrement loop var */
52 bnez t0, 2b /* Loop until we've copied it all */
57 dmfc0 t0, $11,7 /* CvmMemCtl */
58 xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */
59 dmtc0 t0,
[all...]
H A Drelocate_kernel.S79 PTR_LA t0,kexec_flag
80 PTR_SUB t0,t0,t2;
81 PTR_ADD t0,t1,t0;
82 LONG_S zero,(t0)
122 PTR_LA t0,kexec_flag
123 PTR_SUB t0,t0,t2;
124 PTR_ADD t0,t
[all...]
H A Dbmips_vec.S279 mfc0 t0, CP0_PRID
280 andi t2, t0, 0xff00
285 andi t0, 0xff
286 addiu t1, t0, -PRID_REV_BMIPS4380_HI
288 addiu t0, -PRID_REV_BMIPS4380_LO
289 bltz t0, 2f
291 mfc0 t0, $22, 3
294 or t0, t1
295 xor t0, t1
296 or t0, t
[all...]
/linux-master/arch/loongarch/lib/
H A Dunaligned.S30 addi.d t0, a2, -1
31 slli.d t1, t0, 3
32 add.d a0, a0, t0
68 li.w t0, 0
69 1: srl.d t1, a1, t0
71 addi.d t0, t0, 8
H A Ddelay.c14 u64 t0 = get_cycles(); local
16 while ((unsigned long)(get_cycles() - t0) < cycles)
/linux-master/arch/mips/lib/
H A Dmemcpy.S170 #undef t0
174 #define t0 $8 define
301 and t0, src, ADDRMASK
307 bnez t0, .Lsrc_unaligned_dst_aligned\@
309 or t0, t0, t1
310 bnez t0, .Lcopy_unaligned_bytes\@
317 SRL t0, len, LOG_NBYTES+3 # +3 for 8 units/iter
318 beqz t0, .Lcleanup_both_aligned\@ # len < 8*NBYTES
325 LOAD(t0, UNI
[all...]
H A Dcsum_partial.S25 #undef t0
29 #define t0 $8 define
121 lbu t0, (src)
124 sll t0, t0, 8
126 ADDC(sum, t0)
134 lhu t0, (src)
136 ADDC(sum, t0)
148 LOAD32 t0, 0x00(src)
150 ADDC(sum, t0)
[all...]
H A Dmemset.S35 #define FILLPTRG t0
95 sltiu t0, a2, STORSIZE /* very small region? */
97 bnez t0, .Lsmall_memset\@
98 andi t0, a0, STORMASK /* aligned? */
107 beqz t0, 1f
108 PTR_SUBU t0, STORSIZE /* alignment in bytes */
112 beqz t0, 1f
113 PTR_SUBU t0, AT /* alignment in bytes */
125 PTR_SUBU a0, t0 /* long align ptr */
126 PTR_ADDU a2, t0 /* correc
[all...]
H A Dstrncpy_user.S33 move t0, zero
47 PTR_ADDIU t0, 1
49 bne t0, a2, 1b
50 2: PTR_ADDU v0, a1, t0
53 move v0, t0
/linux-master/arch/x86/crypto/
H A Dglue_helper-asm-avx2.S28 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \
29 vpxor t0, t0, t0; \
30 vinserti128 $1, (src), t0, t0; \
31 vpxor t0, x0, x0; \
/linux-master/arch/loongarch/include/asm/
H A Dstackframe.h50 csrwr t0, EXCEPTION_KS0
55 csrrd t0, EXCEPTION_KS0
61 cfi_st t0, PT_R12, \docfi
86 * kernelsp array for it. It stores the current sp in t0 and loads the
92 csrrd t0, PERCPU_BASE_KS variable
93 LONG_ADD t1, t1, t0
95 move t0, sp variable
97 .cfi_register sp, t0
113 move t0, sp variable
122 cfi_st t0, PT_R
125 csrrd t0, LOONGARCH_CSR_PRMD variable
126 LONG_S t0, sp, PT_PRMD variable
127 csrrd t0, LOONGARCH_CSR_CRMD variable
128 LONG_S t0, sp, PT_CRMD variable
129 csrrd t0, LOONGARCH_CSR_EUEN variable
130 LONG_S t0, sp, PT_EUEN variable
131 csrrd t0, LOONGARCH_CSR_ECFG variable
132 LONG_S t0, sp, PT_ECFG variable
133 csrrd t0, LOONGARCH_CSR_ESTAT variable
134 PTR_S t0, sp, PT_ESTAT variable
153 csrrd t0, LOONGARCH_CSR_PRMD variable
154 andi t0, t0, 0x3 /* extract pplv bit */ variable
155 beqz t0, 9f variable
164 csrxchg t0, t0, LOONGARCH_CSR_CRMD variable
[all...]
/linux-master/arch/riscv/kernel/
H A Dsuspend_entry.S46 csrr t0, CSR_EPC
47 REG_S t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0)
48 csrr t0, CSR_STATUS
49 REG_S t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0)
50 csrr t0, CSR_TVAL
51 REG_S t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0)
52 csrr t0, CSR_CAUSE
53 REG_S t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0)
68 add t0, a0, zero
77 add a0, t0, zer
[all...]
/linux-master/arch/loongarch/kernel/
H A Drethook_trampoline.S18 cfi_st t0, PT_R12
38 csrrd t0, LOONGARCH_CSR_CRMD
39 andi t0, t0, 0x7 /* extract bit[1:0] PLV, bit[2] IE */
40 LONG_S t0, sp, PT_CRMD
53 cfi_ld t0, PT_R12
73 LONG_L t0, sp, PT_CRMD
75 csrxchg t0, t1, LOONGARCH_CSR_CRMD
83 addi.d t0, sp, PT_SIZE
84 LONG_S t0, s
[all...]
/linux-master/arch/alpha/lib/
H A Dev6-stxncpy.S22 * t0 = last word written
62 t0 == the first destination word for masking back in
71 mskql t0, a1, t0 # U : assemble the first output word
73 or t0, t3, t0 # E : (stall)
82 t0 == a source word not containing a null. */
90 stq_u t0, 0(a0) # L :
95 ldq_u t0, 0(a1) # L :
97 cmpbge zero, t0, t
[all...]
H A Dstxncpy.S22 * t0 = last word written
51 t0 == the first destination word for masking back in
59 mskql t0, a1, t0 # e0 : assemble the first output word
61 or t0, t3, t0 # e0 :
66 t0 == a source word not containing a null. */
69 stq_u t0, 0(a0) # e0 :
71 ldq_u t0, 0(a1) # e0 :
74 cmpbge zero, t0, t
[all...]
H A Dstxcpy.S43 t0 == the first destination word for masking back in
51 mskql t0, a1, t0 # e0 : assemble the first output word
53 or t0, t3, t1 # e0 :
57 t0 == the first destination word for masking back in
83 ldq_u t0, 0(a0) # e0 :
87 zap t0, t8, t0 # e0 : clear dst bytes <= null
88 or t0, t1, t1 # e1 :
103 xor a0, a1, t0 # e
[all...]
H A Dev6-stxcpy.S54 t0 == the first destination word for masking back in
63 mskql t0, a1, t0 # U : assemble the first output word
65 or t0, t3, t1 # E : (stall)
69 t0 == the first destination word for masking back in
98 ldq_u t0, 0(a0) # L : Latency=3
103 zap t0, t8, t0 # E : clear dst bytes <= null
104 or t0, t1, t1 # E : (stall)
123 xor a0, a1, t0 #
[all...]
/linux-master/arch/riscv/lib/
H A Duaccess.S18 REG_L t0, riscv_v_usercopy_threshold
19 bltu a2, t0, fallback_scalar_usercopy
39 * t0 - end of uncopied dst
41 add t0, a0, a2
84 * t0 - end of aligned dst
86 addi t0, t0, -(8*SZREG) /* not to over run */
106 bltu a0, t0, 2b
108 addi t0, t0,
[all...]
/linux-master/arch/riscv/crypto/
H A Dsm4-riscv64-zvksed-zvkb.S61 la t0, FAMILY_KEY
62 vle32.v v2, (t0)
68 li t0, -4
73 vsse32.v v1, (a2), t0 // Store to rkey_dec.
105 li t0, -4
107 vsse32.v v1, (a2), t0
H A Daes-riscv64-zvkned-zvbb-zvkg.S97 li t0, 16
98 ble LEN, t0, .Linit_single_block\@
110 srli t0, VL, 2 // t0 = N (num blocks)
113 vsetvli zero, t0, e32, m1, ta, ma
119 vsetvli zero, t0, e64, m2, ta, ma
122 slli t1, t0, 1 // t1 = 2*N
142 sll t1, t1, t0 // t1 = 1 << N
162 li t0, 0x40
166 vmv.v.x MULTS_BREV, t0
[all...]
/linux-master/arch/x86/boot/
H A Dtty.c120 int t0, t1; local
122 t0 = gettime();
129 if (t0 != t1) {
131 t0 = t1;
/linux-master/arch/parisc/include/asm/
H A Dchecksum.h30 unsigned long t0, t1, t2; local
53 : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (t0), "=r" (t1), "=r" (t2)
115 unsigned long t0, t1, t2, t3; local
172 "=r" (t0), "=r" (t1), "=r" (t2), "=r" (t3)
/linux-master/arch/arm/crypto/
H A Daes-cipher-core.S22 t0 .req lr
44 __select t0, \in1, 1
46 __load t0, t0, 1, \sz, \op
60 eor \out0, \out0, t0, ror #24
62 __select t0, \in3, 3
71 __load t0, t0, 3, \sz, \op
86 eor \out0, \out0, t0, ror #8
114 rev_l r4, t0
[all...]
/linux-master/arch/parisc/lib/
H A Dlusercopy.S100 t0 = r1 define
118 xor src,dst,t0
119 extru t0,31,2,t1
124 extru t0,31,3,t1
140 ldi 31,t0
142 cmpb,COND(>>=),n t0,len,.Lword_loop
264 depw,z src,28,2,t0
265 subi 32,t0,t0
266 mtsar t0
[all...]
/linux-master/arch/mips/dec/
H A Dint-handler.S132 mfc0 t0,CP0_CAUSE # get pending interrupts
137 andi t0,ST0_IM # CAUSE.CE may be non-zero!
138 and t0,t1 # isolate allowed ones
140 beqz t0,spurious
143 and t2,t0
160 and t2,t0
182 lui t0,(KN02_CSR_BASE>>16)&0xffff
184 lw t0,(t0)
186 andi t1,t0,KN02_IRQ_AL
[all...]

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