/linux-master/arch/arm/lib/ |
H A D | memmove.S | 32 cmphi r2, ip 41 add r1, r1, r2 42 add r0, r0, r2 43 subs r2, r2, #4 51 1: subs r2, r2, #(28) 56 CALGN( sbcsne r4, ip, r2 ) @ C is always set here 59 CALGN( subs r2, r2, i [all...] |
H A D | findbit.S | 29 mov r2, #0 41 add r2, r2, #32 @ next index 42 2: cmp r2, r1 @ any more? 53 cmp r2, r1 55 mov ip, r2, lsr #5 @ word index 57 ands ip, r2, #31 @ bit position 68 and ip, r2, #31 @ bit position 73 orr r2, r2, #3 [all...] |
H A D | memset.S | 30 7: cmp r2, #16 45 2: subs r2, r2, #64 55 tst r2, #32 58 tst r2, #16 80 cmp r2, #96 86 sub r2, r2, r8 94 3: subs r2, r2, #6 [all...] |
H A D | putuser.S | 17 * r2, r3 contains the value 34 1: TUSER(strb) r2, [r0] 43 2: TUSER(strh) r2, [r0] 47 mov ip, r2, lsr #8 49 2: TUSER(strb) r2, [r0], #1 53 3: TUSER(strb) r2, [r0] 63 4: TUSER(str) r2, [r0] 71 5: TUSER(str) r2, [r0] 74 5: TUSER(str) r2, [r0], #4
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H A D | io-readsw-armv3.S | 12 mov r2, lr 26 subs r2, r2, #1 30 teq r2, #0 @ do we have to check for the zero len? 39 subs r2, r2, #8 64 subs r2, r2, #8 67 tst r2, #7 70 .Lno_insw_8: tst r2, # [all...] |
H A D | call_with_stack.S | 36 mov sp, r2 37 mov r2, r0 40 bl_r r2
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H A D | delay-loop.S | 28 ldr r2, .LC1 29 mul r0, r2, r0 @ r0 = delay_us * UDELAY_MULT 31 ldr r2, .LC0 32 ldr r2, [r2] 33 umull r1, r0, r2, r0 @ r0-r1 = r0 * loops_per_jiffy
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H A D | io-writesw-armv3.S | 12 mov r2, lr 27 subs r2, r2, #1 31 teq r2, #0 @ do we have to check for the zero len? 38 subs r2, r2, #8 75 subs r2, r2, #8 78 tst r2, #7 81 .Lno_outsw_8: tst r2, # [all...] |
/linux-master/arch/arm/mach-exynos/ |
H A D | sleep.S | 61 ldr r2, [r0] 62 ldr r2, [r0, r2] 68 ldr r2, [r0] 69 add r0, r2, r0 77 ldr r2, [r1, #L2X0_CTRL] 78 tst r2, #0x1 82 ldr r2, [r0, #L2X0_R_DATA_LATENCY] 89 ldr r2, [r0] 90 add r0, r2, r [all...] |
/linux-master/arch/arm/mach-omap1/ |
H A D | sram.S | 25 mov r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000 26 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000 27 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00 36 strh r0, [r2] @ set dpll into bypass mode 41 strh r0, [r2] @ write new dpll value 49 lock: ldrh r4, [r2], #0 @ read back dpll value
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/linux-master/arch/arm/mach-shmobile/ |
H A D | headsmp-scu.S | 24 ldr r2, [r0, #8] @ SCU Power Status Register 27 bic r2, r2, r3 @ Clear bits of our CPU (Run Mode) 28 str r2, [r0, #8] @ write back
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/linux-master/drivers/scsi/arm/ |
H A D | acornscsi-io.S | 27 subs r2, r2, #16 43 acornscsi_in8: adds r2, r2, #8 52 sub r2, r2, #8 54 acornscsi_in4: adds r2, r2, #4 61 sub r2, r2, # [all...] |
/linux-master/arch/nios2/include/asm/ |
H A D | syscall.h | 15 return regs->r2; 21 regs->r2 = regs->orig_r2; 28 return regs->r7 ? regs->r2 : 0; 34 return regs->r2; 42 regs->r2 = -error; 45 regs->r2 = val;
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/linux-master/lib/crypto/mpi/ |
H A D | mpi-mod.c | 19 MPI r2; /* Helper MPI. */ member in struct:barrett_ctx_s 62 ctx->r2 = mpi_alloc(2 * ctx->k + 1); 72 mpi_free(ctx->r2); 101 MPI r2 = ctx->r2; local 116 * Actually, we don't need qx, we can work direct on r2 118 mpi_set(r2, x); 119 mpi_rshift_limbs(r2, k-1); 120 mpi_mul(r2, r2, [all...] |
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/ |
H A D | arith.fuc | 54 push $r2 // B_hi 59 shr b32 $r2 $r13 16 77 mulu $r3 $r14 $r2 // tmp0 = A_lo * B_hi 86 mulu $r3 $r1 $r2 // tmp0 = A_hi * B_hi 91 pop $r2
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/linux-master/arch/arm/common/ |
H A D | vlock.S | 55 voting_begin r0, r1, r2 57 ldrb r2, [r0, #VLOCK_OWNER_OFFSET] @ check whether lock is held 58 cmp r2, #VLOCK_OWNER_NONE 65 voting_end r0, r1, r2 @ implies DMB 71 MANY( ldr r2, [r0, r3] ) 72 FEW( ldr r2, [r0, #VLOCK_VOTING_OFFSET] ) 73 cmp r2, #0 83 ldrb r2, [r0, #VLOCK_OWNER_OFFSET] 84 eor r0, r1, r2 @ zero if I won, else nonzero 88 voting_end r0, r1, r2 [all...] |
/linux-master/arch/csky/abiv2/ |
H A D | memset.S | 12 cmplti r2, 8 28 zext r18, r2, 31, 4 43 zext r18, r2, 3, 2 44 andi r2, 3 54 zext r18, r2, 2, 0 71 sub r2, r13 78 cmplti r2, 8
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/linux-master/arch/arm/mach-omap2/ |
H A D | sleep33xx.S | 36 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] 37 str r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET] 67 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET] 68 ldr r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET] 95 ldr r2, [r1] 96 bic r2, r2, #AM33XX_CM_CLKCTRL_MODULEMODE_DISABLE 97 str r2, [r1] 101 ldr r2, [r1] 103 cmp r2, r [all...] |
/linux-master/arch/arm/boot/compressed/ |
H A D | debug.S | 10 addruart r1, r2, r3 24 ldmia r1, {r2, r3} 25 add r2, r2, r1 26 ldr r1, [r2, r3]
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/linux-master/arch/hexagon/lib/ |
H A D | memcpy_likely_aligned.S | 19 p0 = cmp.gtu(r2,#64) 25 p0 = cmp.gtu(r2,#32) 28 p1 = cmp.gtu(r2,#40) 29 p2 = cmp.gtu(r2,#48) 43 p0 = cmp.gtu(r2,#56)
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/linux-master/include/linux/ |
H A D | range.h | 16 static inline bool range_contains(struct range *r1, struct range *r2) argument 18 return r1->start <= r2->start && r1->end >= r2->end;
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/linux-master/security/selinux/ss/ |
H A D | mls_types.h | 48 #define mls_range_contains(r1, r2) \ 49 (mls_level_dom(&(r2).level[0], &(r1).level[0]) && \ 50 mls_level_dom(&(r1).level[1], &(r2).level[1]))
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/linux-master/arch/powerpc/kernel/ |
H A D | head_book3s_32.S | 417 * r2: ptr to linux-style pte 426 mfspr r2, SPRN_SDR1 428 rlwinm r2, r2, 28, 0xfffff000 432 lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */ 434 addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */ 436 112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ 437 lwz r2,0(r2) /* ge [all...] |
/linux-master/arch/sh/kernel/cpu/sh2a/ |
H A D | entry.S | 43 mov.l r2,@-sp 45 mov.l $cpu_mode,r2 46 bld.b #6,@(0,r2) !previus SR.MD 50 bset.b #6,@(0,r2) !set SR.MD 51 mov.l $current_thread_info,r2 52 mov.l @r2,r2 55 add r2,r0 ! r0 = kernel stack tail 56 mov r15,r2 ! r2 [all...] |
/linux-master/arch/arm/mach-sunxi/ |
H A D | headsmp.S | 26 movw r2, #(ARM_CPU_PART_MASK & 0xffff) 27 movt r2, #(ARM_CPU_PART_MASK >> 16) 28 and r1, r1, r2 29 movw r2, #(ARM_CPU_PART_CORTEX_A15 & 0xffff) 30 movt r2, #(ARM_CPU_PART_CORTEX_A15 >> 16) 31 cmp r1, r2
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