Searched refs:irq_base (Results 51 - 75 of 137) sorted by relevance

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/linux-master/include/linux/mfd/da9055/
H A Dcore.h33 int irq_base; member in struct:da9055
/linux-master/include/linux/mfd/wm8994/
H A Dpdata.h136 int irq_base; /** Base IRQ number for WM8994, required for IRQs */ member in struct:wm8994_pdata
/linux-master/include/linux/mfd/wm831x/
H A Dpdata.h122 int irq_base; member in struct:wm831x_pdata
/linux-master/include/linux/mfd/da9063/
H A Dcore.h87 unsigned int irq_base; member in struct:da9063
/linux-master/arch/arm/mach-s3c/
H A Dgpio-core.h50 * @irq_base: The base irq number.
72 int irq_base; member in struct:samsung_gpio_chip
91 * This helper returns the irq number calculated from the chip->irq_base and
/linux-master/drivers/irqchip/
H A Dirq-csky-apb-intc.c61 u32 mask_reg, u32 irq_base)
65 gc = irq_get_domain_generic_chip(root_domain, irq_base);
136 u32 irq_base)
141 generic_handle_domain_irq(root_domain, irq_base + __fls(hwirq));
60 ck_set_gc(struct device_node *node, void __iomem *reg_base, u32 mask_reg, u32 irq_base) argument
135 handle_irq_perbit(struct pt_regs *regs, u32 hwirq, u32 irq_base) argument
H A Dirq-hip04.c355 int nr_irqs, irq_base, i; local
383 irq_base = irq_alloc_descs(-1, 0, nr_irqs, numa_node_id());
384 if (irq_base < 0) {
389 hip04_data.domain = irq_domain_add_legacy(node, nr_irqs, irq_base,
397 set_smp_ipi_range(irq_base, 16);
H A Dirq-ath79-misc.c182 int irq_base, bool is_ar71xx)
192 irq_base, 0, &misc_irq_domain_ops, regs);
181 ath79_misc_irq_init(void __iomem *regs, int irq, int irq_base, bool is_ar71xx) argument
/linux-master/drivers/mfd/
H A Dmotorola-cpcap.c55 int irq_base = regmap_irq_chip_get_base(d); local
57 return cpcap_sense_irq(regmap, virq - irq_base);
124 int irq_base, int irq)
129 reg_offset = irq - irq_base;
122 cpcap_init_one_regmap_irq(struct cpcap_ddata *cpcap, struct regmap_irq *rirq, int irq_base, int irq) argument
H A Dmfd-core.c143 int irq_base, struct irq_domain *domain)
250 res[r].start = irq_base +
252 res[r].end = irq_base +
315 * @irq_base: Base of the range of virtual interrupt numbers allocated for
322 int irq_base, struct irq_domain *domain)
329 irq_base, domain);
410 * @irq_base: Base of the range of virtual interrupt numbers allocated for
417 int irq_base, struct irq_domain *domain)
427 irq_base, domain);
140 mfd_add_device(struct device *parent, int id, const struct mfd_cell *cell, struct resource *mem_base, int irq_base, struct irq_domain *domain) argument
319 mfd_add_devices(struct device *parent, int id, const struct mfd_cell *cells, int n_devs, struct resource *mem_base, int irq_base, struct irq_domain *domain) argument
414 devm_mfd_add_devices(struct device *dev, int id, const struct mfd_cell *cells, int n_devs, struct resource *mem_base, int irq_base, struct irq_domain *domain) argument
H A Ducb1x00-ts.c243 enable_irq(ts->ucb->irq_base + UCB_IRQ_TSPX);
294 disable_irq_nosync(ts->ucb->irq_base + UCB_IRQ_TSPX);
317 ret = request_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ucb1x00_ts_irq,
335 free_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ts);
355 free_irq(ts->ucb->irq_base + UCB_IRQ_TSPX, ts);
H A Dda9150-core.c431 da9150->irq_base = pdata->irq_base;
437 da9150->irq_base = -1;
442 da9150->irq_base, &da9150_regmap_irq_chip,
451 da9150->irq_base = regmap_irq_chip_get_base(da9150->regmap_irq_data);
457 da9150->irq_base, NULL);
H A D88pm860x-core.c478 handle_nested_irq(chip->irq_base + i);
575 int nr_irqs, irq_base = -1; local
617 if (pdata && pdata->irq_base)
618 irq_base = pdata->irq_base;
620 chip->irq_base = irq_alloc_descs(irq_base, 0, nr_irqs, 0);
621 if (chip->irq_base < 0) {
623 chip->irq_base);
627 irq_domain_add_legacy(node, nr_irqs, chip->irq_base,
[all...]
/linux-master/arch/arm/mach-ep93xx/
H A Dvision_ep9307.c122 .irq_base = EP93XX_BOARD_IRQ(0),
127 .irq_base = -1,
132 .irq_base = -1,
137 .irq_base = -1,
/linux-master/drivers/macintosh/
H A Dmacio_asic.c252 unsigned int irq_base; local
258 /* irq_base is always 64 on gatwick. I have no cleaner way to get
261 irq_base = 64;
265 macio_create_fixup_irq(dev, 0, 15 + irq_base);
266 macio_create_fixup_irq(dev, 1, 4 + irq_base);
267 macio_create_fixup_irq(dev, 2, 5 + irq_base);
273 macio_create_fixup_irq(dev, 0, 29 + irq_base);
279 macio_create_fixup_irq(dev, 0, 19 + irq_base);
280 macio_create_fixup_irq(dev, 1, 1 + irq_base);
284 macio_create_fixup_irq(dev, 0, 14 + irq_base);
[all...]
/linux-master/kernel/irq/
H A Ddevres.c210 * @irq_base: Interrupt base nr for this chip
219 unsigned int irq_base, void __iomem *reg_base,
227 irq_base, reg_base, handler);
253 * @msk: Bitmask holding the irqs to initialize relative to gc->irq_base
258 * Set up max. 32 interrupts starting from gc->irq_base. Note, this
218 devm_irq_alloc_generic_chip(struct device *dev, const char *name, int num_ct, unsigned int irq_base, void __iomem *reg_base, irq_flow_handler_t handler) argument
/linux-master/include/linux/mfd/
H A Dmax8925.h200 int irq_base; member in struct:max8925_chip
228 * irq_base: stores IRQ base number of MAX8925 in platform
259 int irq_base; member in struct:max8925_platform_data
H A Ducb1x00.h116 unsigned irq_base; member in struct:ucb1x00_plat_data
125 int irq_base; member in struct:ucb1x00
H A Dtps6586x.h91 int irq_base; member in struct:tps6586x_platform_data
H A Dmax8998-private.h132 * @irq_base: base IRQ number for max8998, required for IRQs
147 unsigned int irq_base; member in struct:max8998_dev
H A Dtps65090.h101 int irq_base; member in struct:tps65090_platform_data
/linux-master/drivers/gpio/
H A Dgpio-wm8350.c85 if (!wm8350->irq_base)
88 return wm8350->irq_base + WM8350_IRQ_GPIO(offset);
H A Dgpio-mxc.c350 static int mxc_gpio_init_gc(struct mxc_gpio_port *port, int irq_base) argument
356 gc = devm_irq_alloc_generic_chip(port->dev, "gpio-mxc", 1, irq_base,
426 int irq_base; local
500 irq_base = devm_irq_alloc_descs(&pdev->dev, -1, 0, 32, numa_node_id());
501 if (irq_base < 0) {
502 err = irq_base;
506 port->domain = irq_domain_add_legacy(np, 32, irq_base, 0,
516 err = mxc_gpio_init_gc(port, irq_base);
H A Dgpio-rtd.c67 void __iomem *irq_base; member in struct:rtd_gpio
401 status = readl_relaxed(data->irq_base + reg_offset);
403 writel_relaxed(status, data->irq_base + reg_offset);
444 writel_relaxed(clr_mask, data->irq_base + gpa_reg_offset);
445 writel_relaxed(clr_mask, data->irq_base + gpda_reg_offset);
554 data->irq_base = devm_platform_ioremap_resource(pdev, 1);
555 if (IS_ERR(data->irq_base))
556 return PTR_ERR(data->irq_base);
/linux-master/arch/x86/kvm/
H A Dirq.h34 u8 irq_base; member in struct:kvm_kpic_state

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