Searched refs:reg (Results 251 - 275 of 7209) sorted by relevance

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/linux-master/drivers/clk/socfpga/
H A Dclk-pll-s10.c44 unsigned long fdiv, reg, rdiv, qdiv; local
47 /* read VCO1 reg for numerator and denominator */
48 reg = readl(socfpgaclk->hw.reg + 0x8);
49 fdiv = (reg & SOCFPGA_N5X_PLLDIV_FDIV_MASK) >> SOCFPGA_N5X_PLLDIV_FDIV_SHIFT;
50 rdiv = (reg & SOCFPGA_N5X_PLLDIV_RDIV_MASK);
51 qdiv = (reg & SOCFPGA_N5X_PLLDIV_QDIV_MASK) >> SOCFPGA_N5X_PLLDIV_QDIV_SHIFT;
65 unsigned long arefdiv, reg, mdiv; local
68 /* read VCO1 reg for numerator and denominator */
69 reg
88 unsigned long reg; local
143 u32 reg; local
156 u32 reg; local
190 s10_register_pll(const struct stratix10_pll_clock *clks, void __iomem *reg) argument
230 agilex_register_pll(const struct stratix10_pll_clock *clks, void __iomem *reg) argument
269 n5x_register_pll(const struct stratix10_pll_clock *clks, void __iomem *reg) argument
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/linux-master/drivers/net/ethernet/sunplus/
H A Dspl2sw_phy.c19 u32 reg; local
21 reg = readl(comm->l2sw_reg_base + L2SW_MAC_FORCE_MODE);
24 reg |= FIELD_PREP(MAC_FORCE_RMII_LINK, mac->lan_port);
27 reg |= FIELD_PREP(MAC_FORCE_RMII_SPD, mac->lan_port);
29 reg &= FIELD_PREP(MAC_FORCE_RMII_SPD, ~mac->lan_port) |
34 reg |= FIELD_PREP(MAC_FORCE_RMII_DPX, mac->lan_port);
36 reg &= FIELD_PREP(MAC_FORCE_RMII_DPX, ~mac->lan_port) |
41 reg |= FIELD_PREP(MAC_FORCE_RMII_FC, mac->lan_port);
43 reg &= FIELD_PREP(MAC_FORCE_RMII_FC, ~mac->lan_port) |
47 reg
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/linux-master/drivers/net/wireless/ralink/rt2x00/
H A Drt2500usb.c50 __le16 reg; local
53 &reg, sizeof(reg));
54 return le16_to_cpu(reg);
60 __le16 reg; local
63 &reg, sizeof(reg), REGISTER_TIMEOUT);
64 return le16_to_cpu(reg);
71 __le16 reg = cpu_to_le16(value); local
74 &reg, sizeo
81 __le16 reg = cpu_to_le16(value); local
96 rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev, const unsigned int offset, struct rt2x00_field16 field, u16 *reg) argument
125 u16 reg; local
148 u16 reg; local
182 u16 reg; local
258 u16 reg; local
271 u16 reg; local
289 u16 reg; local
324 u16 reg; local
402 u16 reg; local
435 u16 reg; local
473 u16 reg; local
629 u16 reg; local
674 u16 reg; local
720 u16 reg; local
743 u16 reg; local
768 u16 reg; local
984 u16 reg; local
1126 u16 reg, reg0; local
1427 u16 reg; local
1748 u16 reg; local
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/linux-master/arch/x86/lib/
H A Dretpoline.S19 .macro POLINE reg
24 mov %\reg, (%_ASM_SP)
28 .macro RETPOLINE reg
29 POLINE \reg
33 .macro THUNK reg
36 SYM_INNER_LABEL(__x86_indirect_thunk_\reg, SYM_L_GLOBAL)
40 ALTERNATIVE_2 __stringify(RETPOLINE \reg), \
41 __stringify(lfence; ANNOTATE_RETPOLINE_SAFE; jmp *%\reg; int3), X86_FEATURE_RETPOLINE_LFENCE, \
42 __stringify(ANNOTATE_RETPOLINE_SAFE; jmp *%\reg), ALT_NOT(X86_FEATURE_RETPOLINE)
49 * only see one instance of "__x86_indirect_thunk_\reg" rathe
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/linux-master/drivers/acpi/pmic/
H A Dtps68470_pmic.c20 u32 reg; /* corresponding register */ member in struct:tps68470_pmic_table
39 .reg = TPS68470_REG_S_I2C_CTL,
45 .reg = TPS68470_REG_VCMCTL,
51 .reg = TPS68470_REG_VAUX1CTL,
57 .reg = TPS68470_REG_VAUX2CTL,
63 .reg = TPS68470_REG_VACTL,
69 .reg = TPS68470_REG_VDCTL,
79 .reg = TPS68470_REG_VSIOVAL,
85 .reg = TPS68470_REG_VIOVAL,
91 .reg
197 pmic_get_reg_bit(u64 address, const struct tps68470_pmic_table *table, const unsigned int table_size, int *reg, int *bitmask) argument
217 tps68470_pmic_get_power(struct regmap *regmap, int reg, int bitmask, u64 *value) argument
229 tps68470_pmic_get_vr_val(struct regmap *regmap, int reg, int bitmask, u64 *value) argument
241 tps68470_pmic_get_clk(struct regmap *regmap, int reg, int bitmask, u64 *value) argument
253 tps68470_pmic_get_clk_freq(struct regmap *regmap, int reg, int bitmask, u64 *value) argument
265 ti_tps68470_regmap_update_bits(struct regmap *regmap, int reg, int bitmask, u64 value) argument
284 int reg, ret, bitmask; local
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/linux-master/drivers/clk/sunxi/
H A Dclk-a10-ve.c28 void __iomem *reg; member in struct:ve_reset_data
40 u32 reg; local
44 reg = readl(data->reg);
45 writel(reg & ~BIT(SUN4I_VE_RESET), data->reg);
59 u32 reg; local
63 reg = readl(data->reg);
64 writel(reg | BI
93 void __iomem *reg; local
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/linux-master/arch/powerpc/include/asm/
H A Ddcr-native.h33 extern void __mtdcr(unsigned int reg, unsigned int val);
34 extern unsigned int __mfdcr(unsigned int reg);
39 static inline unsigned int mfdcrx(unsigned int reg) argument
43 : "=r" (ret) : "r" (reg));
47 static inline void mtdcrx(unsigned int reg, unsigned int val) argument
50 : : "r" (val), "r" (reg));
78 static inline unsigned __mfdcri(int base_addr, int base_data, int reg) argument
85 mtdcrx(base_addr, reg);
88 __mtdcr(base_addr, reg);
95 static inline void __mtdcri(int base_addr, int base_data, int reg, argument
111 __dcri_clrset(int base_addr, int base_data, int reg, unsigned clr, unsigned set) argument
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/linux-master/drivers/gpu/drm/amd/include/
H A Dcgs_common.h120 #define CGS_REG_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
121 #define CGS_REG_FIELD_MASK(reg, field) reg##__##field##_MASK
123 #define CGS_REG_SET_FIELD(orig_val, reg, field, field_val) \
124 (((orig_val) & ~CGS_REG_FIELD_MASK(reg, field)) | \
125 (CGS_REG_FIELD_MASK(reg, field) & ((field_val) << CGS_REG_FIELD_SHIFT(reg, field))))
127 #define CGS_REG_GET_FIELD(value, reg, field) \
128 (((value) & CGS_REG_FIELD_MASK(reg, fiel
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/linux-master/drivers/media/platform/samsung/s5p-mfc/
H A Ds5p_mfc_opr_v6.c867 unsigned int reg = 0; local
884 reg = 0;
885 reg |= p->gop_size & 0xFFFF;
886 writel(reg, mfc_regs->e_gop_config);
891 reg = 0;
893 reg |= (0x1 << 3);
894 writel(reg, mfc_regs->e_enc_options);
897 reg |= (0x1 << 3);
898 writel(reg, mfc_regs->e_enc_options);
901 reg
1061 unsigned int reg = 0; local
1354 unsigned int reg = 0; local
1436 unsigned int reg = 0; local
1506 unsigned int reg = 0; local
1599 unsigned int reg = 0; local
1754 unsigned int reg = 0; local
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/linux-master/arch/arm/mach-mvebu/
H A Dpmsu.c206 u32 reg; local
212 reg = readl(pmsu_mp_base + L2C_NFABRIC_PM_CTL);
213 reg |= L2C_NFABRIC_PM_CTL_PWR_DOWN;
214 writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
227 u32 reg; local
237 reg = readl(pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
238 reg |= PMSU_STATUS_AND_MASK_CPU_IDLE_WAIT |
244 writel(reg, pmsu_mp_base + PMSU_STATUS_AND_MASK(hw_cpu));
246 reg = readl(pmsu_mp_base + PMSU_CONTROL_AND_CONFIG(hw_cpu));
249 reg |
342 u32 reg; local
427 u32 reg; local
537 u32 reg; local
573 u32 reg; local
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/linux-master/arch/arm/boot/dts/
H A Dcros-ec-sbs.dtsi48 reg = <0xb>;
/linux-master/arch/arm/nwfpe/
H A Dfpa11.inl31 static inline void writeFPSR(FPSR reg)
35 fpa11->fpsr = (fpa11->fpsr & MASK_SYSID) | (reg & ~MASK_SYSID);
46 static inline void writeFPCR(FPCR reg)
50 fpa11->fpcr |= (reg & MASK_WFC); /* write SB, AB and DA bits */
/linux-master/arch/powerpc/boot/dts/fsl/
H A Dpq3-espi-0.dtsi39 reg = <0x7000 0x1000>;
H A Dpq3-etsec2-grp2-0.dtsi39 reg = <0xb4000 0x1000>;
H A Dpq3-etsec2-grp2-1.dtsi39 reg = <0xb5000 0x1000>;
H A Dpq3-etsec2-grp2-2.dtsi39 reg = <0xb6000 0x1000>;
H A Dpq3-gpio-0.dtsi38 reg = <0xfc00 0x100>;
H A Dpq3-i2c-0.dtsi40 reg = <0x3000 0x100>;
H A Dpq3-i2c-1.dtsi40 reg = <0x3100 0x100>;
H A Dpq3-mpic.dtsi39 reg = <0x40000 0x40000>;
49 reg = <0x41100 0x100 0x41300 4>;
58 reg = <0x41400 0x200>;
68 reg = <0x41600 0x80>;
H A Dpq3-usb2-dr-0.dtsi37 reg = <0x22000 0x1000>;
H A Dpq3-usb2-dr-1.dtsi37 reg = <0x23000 0x1000>;
H A Dqoriq-bman1.dtsi37 reg = <0x31a000 0x1000>;
H A Dqoriq-espi-0.dtsi39 reg = <0x110000 0x1000>;
H A Dqoriq-gpio-0.dtsi37 reg = <0x130000 0x1000>;

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