Searched refs:chan (Results 251 - 275 of 1789) sorted by relevance

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/linux-master/drivers/gpu/ipu-v3/
H A Dipu-prg.c78 struct ipu_prg_channel chan[3]; member in struct:ipu_prg
198 prg->chan[prg_chan].used_pre = 0;
208 prg->chan[prg_chan].used_pre = i;
230 dev_err(prg->dev, "could not get PRE for PRG chan %d", prg_chan);
236 struct ipu_prg_channel *chan = &prg->chan[prg_chan]; local
238 ipu_pre_put(prg->pres[chan->used_pre]);
239 chan->used_pre = -1;
246 struct ipu_prg_channel *chan; local
252 chan
280 struct ipu_prg_channel *chan; local
346 struct ipu_prg_channel *chan; local
[all...]
/linux-master/arch/m68k/mac/
H A Diop.c310 int iop_listen(uint iop_num, uint chan, argument
315 if (chan >= NUM_IOP_CHAN) return -EINVAL;
316 if (iop_listeners[iop_num][chan].handler && handler) return -EINVAL;
317 iop_listeners[iop_num][chan].devname = devname;
318 iop_listeners[iop_num][chan].handler = handler;
331 int chan = msg->channel; local
334 iop_pr_debug("iop_num %d chan %d reply %*ph\n",
344 IOP_ADDR_RECV_STATE + chan, IOP_MSG_COMPLETE);
359 iop_pr_debug("iop_num %d chan %d message %*ph\n",
378 static void iop_handle_send(uint iop_num, uint chan) argument
409 iop_handle_recv(uint iop_num, uint chan) argument
450 iop_send_message(uint iop_num, uint chan, void *privdata, uint msg_len, __u8 *msg_data, void (*handler)(struct iop_msg *)) argument
[all...]
/linux-master/drivers/comedi/drivers/
H A Dadq12b.c111 unsigned int chan = CR_CHAN(insn->chanspec); local
118 val = ADQ12B_CTREG_RANGE(range) | ADQ12B_CTREG_CHAN(chan);
157 unsigned int chan; local
162 for (chan = 0; chan < 8; chan++) {
163 if ((mask >> chan) & 0x01) {
164 val = (s->state >> chan) & 0x01;
165 outb((val << 3) | chan,
H A Ds626.c515 u16 chan, int16_t dacdata)
525 signmask = 1 << chan;
549 ws_image = (chan & 2) ? S626_WS1 : S626_WS2;
565 * (A10D DDDD), (DDDD DDDD), (0x0F), (0x00) where A is chan<0>,
576 val |= ((u32)(chan & 1) << 15); /* Address the DAC channel
587 u32 chan; local
596 chan = s626_trimchan[logical_chan];
630 return s626_send_dac(dev, (chan << 8) | dac_data);
663 unsigned int chan, u16 value)
665 s626_debi_replace(dev, S626_LP_CRB(chan),
514 s626_set_dac(struct comedi_device *dev, u16 chan, int16_t dacdata) argument
662 s626_set_latch_source(struct comedi_device *dev, unsigned int chan, u16 value) argument
673 s626_preload(struct comedi_device *dev, unsigned int chan, u32 value) argument
685 s626_reset_cap_flags(struct comedi_device *dev, unsigned int chan) argument
705 s626_set_mode_a(struct comedi_device *dev, unsigned int chan, u16 setup, u16 disable_int_src) argument
783 s626_set_mode_b(struct comedi_device *dev, unsigned int chan, u16 setup, u16 disable_int_src) argument
868 s626_set_mode(struct comedi_device *dev, unsigned int chan, u16 setup, u16 disable_int_src) argument
881 s626_set_enable(struct comedi_device *dev, unsigned int chan, u16 enab) argument
902 s626_set_load_trig(struct comedi_device *dev, unsigned int chan, u16 trig) argument
926 s626_set_int_src(struct comedi_device *dev, unsigned int chan, u16 int_source) argument
983 s626_pulse_index(struct comedi_device *dev, unsigned int chan) argument
1013 s626_dio_set_irq(struct comedi_device *dev, unsigned int chan) argument
1489 u16 chan = CR_CHAN(insn->chanspec); local
1649 s626_timer_load(struct comedi_device *dev, unsigned int chan, int tick) argument
1924 unsigned int chan = CR_CHAN(insn->chanspec); local
2016 unsigned int chan = CR_CHAN(insn->chanspec); local
2051 unsigned int chan = CR_CHAN(insn->chanspec); local
2074 unsigned int chan = CR_CHAN(insn->chanspec); local
2099 int chan; local
2171 u16 chan; local
[all...]
H A Dcb_pcimdda.c87 unsigned int chan = CR_CHAN(insn->chanspec); local
88 unsigned long offset = dev->iobase + PCIMDDA_DA_CHAN(chan);
89 unsigned int val = s->readback[chan];
107 s->readback[chan] = val;
117 unsigned int chan = CR_CHAN(insn->chanspec); local
120 inw(dev->iobase + PCIMDDA_DA_CHAN(chan));
H A Dc6xdigio.c86 unsigned int chan, unsigned int val)
88 unsigned int cmd = C6XDIGIO_DATA_PWM | C6XDIGIO_DATA_CHAN(chan);
111 unsigned int chan)
113 unsigned int cmd = C6XDIGIO_DATA_ENCODER | C6XDIGIO_DATA_CHAN(chan);
153 unsigned int chan = CR_CHAN(insn->chanspec); local
154 unsigned int val = (s->state >> (16 * chan)) & 0xffff;
159 c6xdigio_pwm_write(dev, chan, val);
168 s->state &= (0xffff << (16 * chan));
169 s->state |= (val << (16 * chan));
179 unsigned int chan local
85 c6xdigio_pwm_write(struct comedi_device *dev, unsigned int chan, unsigned int val) argument
110 c6xdigio_encoder_read(struct comedi_device *dev, unsigned int chan) argument
196 unsigned int chan = CR_CHAN(insn->chanspec); local
[all...]
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_bo5039.c39 nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, argument
43 struct nvif_push *push = chan->chan.push;
137 nv50_bo_move_init(struct nouveau_channel *chan, u32 handle) argument
139 struct nvif_push *push = chan->chan.push;
147 PUSH_MTHD(push, NV5039, SET_CONTEXT_DMA_NOTIFY, chan->drm->ntfy.handle,
148 SET_CONTEXT_DMA_BUFFER_IN, chan->vram.handle,
149 SET_CONTEXT_DMA_BUFFER_OUT, chan->vram.handle);
/linux-master/drivers/dma/
H A Dmoxart-dma.c162 static struct device *chan2dev(struct dma_chan *chan) argument
164 return &chan->dev->device;
169 return container_of(c, struct moxart_chan, vc.chan);
183 static int moxart_terminate_all(struct dma_chan *chan) argument
185 struct moxart_chan *ch = to_moxart_dma_chan(chan);
190 dev_dbg(chan2dev(chan), "%s: ch=%p\n", __func__, ch);
210 static int moxart_slave_config(struct dma_chan *chan, argument
213 struct moxart_chan *ch = to_moxart_dma_chan(chan);
267 struct dma_chan *chan, struct scatterlist *sgl,
271 struct moxart_chan *ch = to_moxart_dma_chan(chan);
266 moxart_prep_slave_sg( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction dir, unsigned long tx_flags, void *context) argument
332 struct dma_chan *chan; local
345 moxart_alloc_chan_resources(struct dma_chan *chan) argument
356 moxart_free_chan_resources(struct dma_chan *chan) argument
415 moxart_dma_start_desc(struct dma_chan *chan) argument
435 moxart_issue_pending(struct dma_chan *chan) argument
473 moxart_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
[all...]
H A Dmxs-dma.c110 struct dma_chan chan; member in struct:mxs_dma_chan
178 static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan) argument
180 return container_of(chan, struct mxs_dma_chan, chan);
183 static void mxs_dma_reset_chan(struct dma_chan *chan) argument
185 struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
187 int chan_id = mxs_chan->chan.chan_id;
232 static void mxs_dma_enable_chan(struct dma_chan *chan) argument
234 struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
236 int chan_id = mxs_chan->chan
255 mxs_dma_disable_chan(struct dma_chan *chan) argument
262 mxs_dma_pause_chan(struct dma_chan *chan) argument
280 mxs_dma_resume_chan(struct dma_chan *chan) argument
327 int chan = mxs_dma_irq_to_chan(mxs_dma, irq); local
395 mxs_dma_alloc_chan_resources(struct dma_chan *chan) argument
437 mxs_dma_free_chan_resources(struct dma_chan *chan) argument
474 mxs_dma_prep_slave_sg( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) argument
573 mxs_dma_prep_dma_cyclic( struct dma_chan *chan, dma_addr_t dma_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) argument
638 mxs_dma_terminate_all(struct dma_chan *chan) argument
646 mxs_dma_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
705 mxs_dma_filter_fn(struct dma_chan *chan, void *fn_param) argument
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dnv40.c26 #include "chan.h"
39 nv40_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv) argument
41 struct nvkm_memory *ramfc = chan->cgrp->runl->fifo->engine.subdev.device->imem->ramfc;
42 const u32 base = chan->id * 128;
44 chan->ramfc_offset = base;
49 nvkm_wo32(ramfc, base + 0x0c, chan->push->addr >> 4);
111 nv40_eobj_ramht_add(struct nvkm_engn *engn, struct nvkm_object *eobj, struct nvkm_chan *chan) argument
113 struct nvkm_fifo *fifo = chan->cgrp->runl->fifo;
115 u32 context = chan->id << 23 | engn->id << 20;
119 hash = nvkm_ramht_insert(imem->ramht, eobj, chan
125 nv40_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) argument
[all...]
/linux-master/drivers/iio/frequency/
H A Dadmfm2000.c35 static int admfm2000_mode(struct iio_dev *indio_dev, u32 chan, u32 mode) argument
43 gpiod_set_value_cansleep(st->sw1_ch[i], (chan == 0) ? 1 : 0);
44 gpiod_set_value_cansleep(st->sw2_ch[i], (chan == 0) ? 0 : 1);
49 gpiod_set_value_cansleep(st->sw1_ch[i], (chan == 0) ? 0 : 1);
50 gpiod_set_value_cansleep(st->sw2_ch[i], (chan == 0) ? 1 : 0);
58 static int admfm2000_attenuation(struct iio_dev *indio_dev, u32 chan, u32 value) argument
63 switch (chan) {
78 struct iio_chan_spec const *chan, int *val,
87 gain = ~(st->gain[chan->channel]) * -1000;
99 struct iio_chan_spec const *chan, in
77 admfm2000_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) argument
98 admfm2000_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) argument
127 admfm2000_write_raw_get_fmt(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, long mask) argument
[all...]
/linux-master/drivers/iio/buffer/
H A Dindustrialio-buffer-dmaengine.c35 struct dma_chan *chan; member in struct:dmaengine_buffer
73 desc = dmaengine_prep_slave_single(dmaengine_buffer->chan,
90 dma_async_issue_pending(dmaengine_buffer->chan);
100 dmaengine_terminate_sync(dmaengine_buffer->chan);
168 struct dma_chan *chan; local
175 chan = dma_request_chan(dev, channel);
176 if (IS_ERR(chan)) {
177 ret = PTR_ERR(chan);
181 ret = dma_get_slave_caps(chan, &caps);
197 dmaengine_buffer->chan
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv10.c30 #include <engine/fifo/chan.h>
393 struct nv10_gr_chan *chan[32]; member in struct:nv10_gr
431 nv17_gr_mthd_lma_window(struct nv10_gr_chan *chan, u32 mthd, u32 data) argument
433 struct nvkm_device *device = chan->object.engine->subdev.device;
434 struct nvkm_gr *gr = &chan->gr->base;
435 struct pipe_state *pipe = &chan->pipe_state;
440 chan->lma_window[(mthd - 0x1638) / 4] = data;
450 PIPE_RESTORE(device, chan->lma_window, 0x6790);
504 nv17_gr_mthd_lma_enable(struct nv10_gr_chan *chan, u32 mthd, u32 data) argument
506 struct nvkm_device *device = chan
516 nv17_gr_mthd_celcius(struct nv10_gr_chan *chan, u32 mthd, u32 data) argument
531 nv10_gr_mthd(struct nv10_gr_chan *chan, u8 class, u32 mthd, u32 data) argument
550 struct nv10_gr_chan *chan = NULL; local
560 nv10_gr_save_pipe(struct nv10_gr_chan *chan) argument
579 nv10_gr_load_pipe(struct nv10_gr_chan *chan) argument
630 nv10_gr_create_pipe(struct nv10_gr_chan *chan) argument
812 nv10_gr_load_dma_vtxbuf(struct nv10_gr_chan *chan, int chid, u32 inst) argument
883 nv10_gr_load_context(struct nv10_gr_chan *chan, int chid) argument
910 nv10_gr_unload_context(struct nv10_gr_chan *chan) argument
956 struct nv10_gr_chan *chan = nv10_gr_chan(object); local
973 struct nv10_gr_chan *chan = nv10_gr_chan(object); local
1006 struct nv10_gr_chan *chan; local
1097 struct nv10_gr_chan *chan; local
[all...]
H A Dnv40.c77 struct nv40_gr_chan *chan = nv40_gr_chan(object); local
78 struct nv40_gr *gr = chan->gr;
82 chan->inst = (*pgpuobj)->addr;
85 nvkm_wo32(*pgpuobj, 0x00000, chan->inst >> 4);
94 struct nv40_gr_chan *chan = nv40_gr_chan(object); local
95 struct nv40_gr *gr = chan->gr;
98 u32 inst = 0x01000000 | chan->inst >> 4;
132 struct nv40_gr_chan *chan = nv40_gr_chan(object); local
134 spin_lock_irqsave(&chan->gr->base.engine.lock, flags);
135 list_del(&chan
152 struct nv40_gr_chan *chan; local
235 struct nv40_gr_chan *temp, *chan = NULL; local
[all...]
H A Dctxgv100.c62 gv100_grctx_generate_attrib(struct gf100_gr_chan *chan) argument
64 struct gf100_gr *gr = chan->gr;
75 gf100_grctx_patch_wr32(chan, 0x405830, attrib);
76 gf100_grctx_patch_wr32(chan, 0x40585c, alpha);
77 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches);
90 gf100_grctx_patch_wr32(chan, o + 0xc0, gs);
91 gf100_grctx_patch_wr32(chan, o + 0xf4, bo);
92 gf100_grctx_patch_wr32(chan, o + 0xf0, bs);
94 gf100_grctx_patch_wr32(chan, o + 0xe4, as);
95 gf100_grctx_patch_wr32(chan,
106 gv100_grctx_generate_attrib_cb(struct gf100_gr_chan *chan, u64 addr, u32 size) argument
[all...]
/linux-master/crypto/async_tx/
H A Dasync_xor.c23 do_async_xor(struct dma_chan *chan, struct dmaengine_unmap_data *unmap, argument
26 struct dma_device *dma = chan->device;
65 tx = dma->device_prep_dma_xor(chan, dma_dest, src_list,
74 dma_async_issue_pending(chan);
75 tx = dma->device_prep_dma_xor(chan, dma_dest,
83 async_tx_submit(chan, tx, submit);
186 struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR, local
189 struct dma_device *device = chan ? chan->device : NULL;
220 tx = do_async_xor(chan, unma
320 struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len); local
[all...]
/linux-master/sound/synth/emux/
H A Demux_synth.c27 int *notep, int vel, struct snd_midi_channel *chan,
29 static int get_bank(struct snd_emux_port *port, struct snd_midi_channel *chan);
31 struct snd_midi_channel *chan, int free);
46 snd_emux_note_on(void *p, int note, int vel, struct snd_midi_channel *chan) argument
56 if (snd_BUG_ON(!port || !chan))
64 nvoices = get_zone(emu, port, &note, vel, chan, table);
77 terminate_note1(emu, key, chan, 0);
96 vp->chan = chan;
121 vp->chan
145 snd_emux_note_off(void *p, int note, int vel, struct snd_midi_channel *chan) argument
222 snd_emux_key_press(void *p, int note, int vel, struct snd_midi_channel *chan) argument
255 snd_emux_update_channel(struct snd_emux_port *port, struct snd_midi_channel *chan, int update) argument
311 snd_emux_control(void *p, int type, struct snd_midi_channel *chan) argument
364 terminate_note1(struct snd_emux *emu, int note, struct snd_midi_channel *chan, int free) argument
385 snd_emux_terminate_note(void *p, int note, struct snd_midi_channel *chan) argument
641 struct snd_midi_channel *chan = vp->chan; local
744 struct snd_midi_channel *chan = vp->chan; local
813 struct snd_midi_channel *chan = vp->chan; local
861 get_bank(struct snd_emux_port *port, struct snd_midi_channel *chan) argument
890 get_zone(struct snd_emux *emu, struct snd_emux_port *port, int *notep, int vel, struct snd_midi_channel *chan, struct snd_sf_zone **table) argument
[all...]
/linux-master/drivers/net/wireless/ath/ath9k/
H A Dar9003_phy.c127 * @chan:
149 static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) argument
156 ath9k_hw_get_channel_centers(ah, chan, &centers);
223 ah->curchan = chan;
231 * @chan:
239 struct ath9k_channel *chan)
245 u8 *spur_fbin_ptr = ar9003_get_spur_chan_ptr(ah, IS_CHAN_2GHZ(chan));
257 if (IS_CHAN_HT40(chan)) {
261 synth_freq = chan->channel + 10;
263 synth_freq = chan
238 ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah, struct ath9k_channel *chan) argument
469 ar9003_hw_spur_ofdm_work(struct ath_hw *ah, struct ath9k_channel *chan, int freq_offset, int range, int synth_freq) argument
520 ar9003_hw_spur_mitigate_ofdm(struct ath_hw *ah, struct ath9k_channel *chan) argument
568 ar9003_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan) argument
576 ar9003_hw_compute_pll_control_soc(struct ath_hw *ah, struct ath9k_channel *chan) argument
593 ar9003_hw_compute_pll_control(struct ath_hw *ah, struct ath9k_channel *chan) argument
610 ar9003_hw_set_channel_regs(struct ath_hw *ah, struct ath9k_channel *chan) argument
650 ar9003_hw_init_bb(struct ath_hw *ah, struct ath9k_channel *chan) argument
769 ar9550_hw_get_modes_txgain_index(struct ath_hw *ah, struct ath9k_channel *chan) argument
794 ar9561_hw_get_modes_txgain_index(struct ath_hw *ah, struct ath9k_channel *chan) argument
855 ar9003_hw_process_ini(struct ath_hw *ah, struct ath9k_channel *chan) argument
967 ar9003_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) argument
995 ar9003_hw_set_delta_slope(struct ath_hw *ah, struct ath9k_channel *chan) argument
1066 struct ath9k_channel *chan = ah->curchan; local
1393 struct ath9k_channel *chan = ah->curchan; local
1664 ar9003_hw_fast_chan_change(struct ath_hw *ah, struct ath9k_channel *chan, u8 *ini_reloaded) argument
1883 ar9003_hw_init_rate_txpower(struct ath_hw *ah, u8 *rate_array, struct ath9k_channel *chan) argument
[all...]
/linux-master/drivers/dma/mediatek/
H A Dmtk-uart-apdma.c111 return container_of(c, struct mtk_chan, vc.chan);
139 to_mtk_uart_apdma_dev(c->vc.chan.device);
157 dev_err(c->vc.chan.device->dev, "Enable TX fail\n");
182 to_mtk_uart_apdma_dev(c->vc.chan.device);
201 dev_err(c->vc.chan.device->dev, "Enable RX fail\n");
254 struct dma_chan *chan = (struct dma_chan *)dev_id; local
255 struct mtk_chan *c = to_mtk_uart_apdma_chan(chan);
269 static int mtk_uart_apdma_alloc_chan_resources(struct dma_chan *chan) argument
271 struct mtk_uart_apdmadev *mtkd = to_mtk_uart_apdma_dev(chan->device);
272 struct mtk_chan *c = to_mtk_uart_apdma_chan(chan);
308 mtk_uart_apdma_free_chan_resources(struct dma_chan *chan) argument
322 mtk_uart_apdma_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) argument
342 mtk_uart_apdma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sglen, enum dma_transfer_direction dir, unsigned long tx_flags, void *context) argument
365 mtk_uart_apdma_issue_pending(struct dma_chan *chan) argument
385 mtk_uart_apdma_slave_config(struct dma_chan *chan, struct dma_slave_config *config) argument
395 mtk_uart_apdma_terminate_all(struct dma_chan *chan) argument
443 mtk_uart_apdma_device_pause(struct dma_chan *chan) argument
[all...]
/linux-master/drivers/iio/humidity/
H A Dhdc100x.c147 static int hdc100x_set_it_time(struct hdc100x_data *data, int chan, int val2) argument
149 int shift = hdc100x_resolution_shift[chan].shift;
153 for (i = 0; i < ARRAY_SIZE(hdc100x_int_time[chan]); i++) {
154 if (val2 && val2 == hdc100x_int_time[chan][i]) {
156 hdc100x_resolution_shift[chan].mask << shift,
159 data->adc_int_us[chan] = val2;
168 struct iio_chan_spec const *chan)
171 int delay = data->adc_int_us[chan->address] + 1*USEC_PER_MSEC;
176 ret = i2c_smbus_write_byte(client, chan->address);
200 struct iio_chan_spec const *chan, in
167 hdc100x_get_measurement(struct hdc100x_data *data, struct iio_chan_spec const *chan) argument
199 hdc100x_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) argument
254 hdc100x_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) argument
[all...]
/linux-master/drivers/dma/idxd/
H A Ddma.c19 idxd_chan = container_of(c, struct idxd_dma_chan, chan);
135 static int idxd_dma_alloc_chan_resources(struct dma_chan *chan) argument
137 struct idxd_wq *wq = to_idxd_wq(chan);
146 static void idxd_dma_free_chan_resources(struct dma_chan *chan) argument
148 struct idxd_wq *wq = to_idxd_wq(chan);
173 struct dma_chan *c = tx->chan;
254 struct dma_chan *chan; local
261 chan = &idxd_chan->chan;
262 chan
288 struct dma_chan *chan = &idxd_chan->chan; local
[all...]
/linux-master/drivers/iio/adc/
H A Dad7091r-base.c82 struct iio_chan_spec const *chan,
96 ret = ad7091r_read_one(iio_dev, chan->channel, &read_val);
114 *val2 = chan->scan_type.realbits;
123 const struct iio_chan_spec *chan,
133 AD7091R_REG_CH_HIGH_LIMIT(chan->channel),
140 AD7091R_REG_CH_LOW_LIMIT(chan->channel),
151 const struct iio_chan_spec *chan,
168 AD7091R_REG_CH_HIGH_LIMIT(chan->channel),
172 AD7091R_REG_CH_LOW_LIMIT(chan->channel),
181 const struct iio_chan_spec *chan,
81 ad7091r_read_raw(struct iio_dev *iio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long m) argument
122 ad7091r_read_event_config(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir) argument
150 ad7091r_write_event_config(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, int state) argument
180 ad7091r_read_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int *val, int *val2) argument
221 ad7091r_write_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int val, int val2) argument
[all...]
/linux-master/drivers/net/wireless/quantenna/qtnfmac/
H A Dqlink_util.c119 struct ieee80211_channel *chan; local
121 chan = ieee80211_get_channel(wiphy, le16_to_cpu(qch->chan.center_freq));
123 chdef->chan = chan;
134 struct ieee80211_channel *chan = chdef->chan; local
136 qch->chan.hw_value = cpu_to_le16(chan->hw_value);
137 qch->chan
[all...]
/linux-master/drivers/iio/dac/
H A Dad5624r_spi.c46 struct iio_chan_spec const *chan,
56 *val2 = chan->scan_type.realbits;
63 struct iio_chan_spec const *chan,
72 if (val >= (1 << chan->scan_type.realbits) || val < 0)
77 chan->address, val,
78 chan->scan_type.shift);
91 const struct iio_chan_spec *chan)
99 const struct iio_chan_spec *chan, unsigned int mode)
116 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
121 !!(st->pwr_down_mask & (1 << chan
45 ad5624r_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long m) argument
62 ad5624r_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) argument
90 ad5624r_get_powerdown_mode(struct iio_dev *indio_dev, const struct iio_chan_spec *chan) argument
98 ad5624r_set_powerdown_mode(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, unsigned int mode) argument
115 ad5624r_read_dac_powerdown(struct iio_dev *indio_dev, uintptr_t private, const struct iio_chan_spec *chan, char *buf) argument
124 ad5624r_write_dac_powerdown(struct iio_dev *indio_dev, uintptr_t private, const struct iio_chan_spec *chan, const char *buf, size_t len) argument
[all...]
/linux-master/drivers/power/supply/
H A Dgeneric-adc-battery.c161 int chan; local
198 for (chan = 0; chan < ARRAY_SIZE(gab_chan_name); chan++) {
199 adc_bat->channel[chan] = devm_iio_channel_get(&pdev->dev, gab_chan_name[chan]);
200 if (IS_ERR(adc_bat->channel[chan])) {
201 ret = PTR_ERR(adc_bat->channel[chan]);
203 return dev_err_probe(&pdev->dev, ret, "Failed to get ADC channel %s\n", gab_chan_name[chan]);
204 adc_bat->channel[chan]
[all...]

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