/linux-master/drivers/gpu/drm/amd/display/dc/basics/ |
H A D | conversion.c | 91 uint32_t reg_value = local 100 matrix[i] = (uint16_t)reg_value;
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/linux-master/drivers/media/dvb-frontends/cxd2880/ |
H A D | cxd2880_tnrdmd_dvbt2_mon.c | 1228 u16 *reg_value) 1236 if (!tnr_dmd || !reg_value) 1275 *reg_value = (data[0] << 8) | data[1]; 1281 u32 reg_value, int *snr) 1286 if (reg_value == 0) 1289 if (reg_value > 10876) 1290 reg_value = 10876; 1292 *snr = intlog10(reg_value) - intlog10(12600 - reg_value); 1301 u16 reg_value local 1227 dvbt2_read_snr_reg(struct cxd2880_tnrdmd *tnr_dmd, u16 *reg_value) argument 1280 dvbt2_calc_snr(struct cxd2880_tnrdmd *tnr_dmd, u32 reg_value, int *snr) argument 1340 u16 reg_value = 0; local [all...] |
/linux-master/drivers/misc/ |
H A D | xilinx_sdfec.c | 264 u32 reg_value; local 268 reg_value = xsdfec_regread(xsdfec, XSDFEC_ORDER_ADDR); 269 xsdfec->config.order = reg_value; 279 reg_value = xsdfec_regread(xsdfec, XSDFEC_IMR_ADDR); 280 xsdfec->config.irq.enable_isr = (reg_value & XSDFEC_ISR_MASK) > 0; 282 reg_value = xsdfec_regread(xsdfec, XSDFEC_ECC_IMR_ADDR); 284 (reg_value & XSDFEC_ECC_ISR_MASK) > 0; 286 reg_value = xsdfec_regread(xsdfec, XSDFEC_AXIS_ENABLE_ADDR); 287 sdfec_started = (reg_value & XSDFEC_AXIS_IN_ENABLE_MASK) > 0; 438 u32 reg_value; local 782 u32 reg_value; local 832 u32 reg_value; local [all...] |
/linux-master/drivers/net/ethernet/stmicro/stmmac/ |
H A D | stmmac_hwtstamp.c | 31 u32 reg_value; local 53 reg_value = data; 55 reg_value <<= GMAC4_PTP_SSIR_SSINC_SHIFT; 57 writel(reg_value, ioaddr + PTP_SSIR);
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/linux-master/drivers/gpu/drm/imagination/ |
H A D | pvr_device.h | 563 * @reg_value: Expected register value (after masking). 564 * @reg_mask: Mask of bits valid for comparison with @reg_value. 572 pvr_cr_poll_reg32(struct pvr_device *pvr_dev, u32 reg_addr, u32 reg_value, argument 578 (value & reg_mask) == reg_value, 0, timeout_usec); 586 * @reg_value: Expected register value (after masking). 587 * @reg_mask: Mask of bits valid for comparison with @reg_value. 595 pvr_cr_poll_reg64(struct pvr_device *pvr_dev, u32 reg_addr, u64 reg_value, argument 601 (value & reg_mask) == reg_value, 0, timeout_usec);
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H A D | pvr_fw_startstop.c | 195 u32 reg_value; local 277 err = pvr_meta_cr_read32(pvr_dev, META_CR_TxVECINT_BHALT, ®_value); 286 if (reg_value)
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/linux-master/drivers/net/ethernet/microchip/ |
H A D | lan743x_ethtool.c | 30 u32 reg_value; local 32 reg_value = lan743x_csr_read(adapter, OTP_PWR_DN); 34 if (reg_value & OTP_PWR_DN_PWRDN_N_) { 36 reg_value &= ~OTP_PWR_DN_PWRDN_N_; 37 lan743x_csr_write(adapter, OTP_PWR_DN, reg_value); 47 u32 reg_value; local 49 reg_value = lan743x_csr_read(adapter, OTP_PWR_DN); 50 if (!(reg_value & OTP_PWR_DN_PWRDN_N_)) { 52 reg_value |= OTP_PWR_DN_PWRDN_N_; 53 lan743x_csr_write(adapter, OTP_PWR_DN, reg_value); 217 u32 reg_value; local 233 u32 reg_value; local [all...] |
/linux-master/arch/mips/include/asm/sn/sn0/ |
H A D | hubio.h | 203 u64 reg_value; member in union:hubii_wstat_u 445 u64 reg_value; member in union:icrba_u 467 u64 reg_value; member in union:h1_icrba_u 514 u64 reg_value; member in union:icrbb_u 556 u64 reg_value; member in union:h1_icrbb_u 672 u64 reg_value; member in union:icrbc_s 709 u64 reg_value; member in union:icrbd_s 824 u64 reg_value; member in union:iprb_u 839 #define iprb_regval reg_value
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/linux-master/drivers/video/fbdev/via/ |
H A D | hw.c | 1014 int reg_value; local 1020 reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte); 1024 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); 1027 reg_value = IGA2_FETCH_COUNT_FORMULA(h_addr, bpp_byte); 1031 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); 1039 int reg_value; local 1159 reg_value = IGA1_FIFO_DEPTH_SELECT_FORMULA(iga1_fifo_max_depth); 1163 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); 1166 reg_value = IGA1_FIFO_THRESHOLD_FORMULA(iga1_fifo_threshold); 1173 viafb_load_reg(reg_value, viafb_load_reg_nu [all...] |
H A D | lcd.c | 338 int reg_value = 0; local 353 reg_value = 359 viafb_load_reg(reg_value, 373 reg_value = 380 viafb_load_reg(reg_value, 385 DEBUG_MSG(KERN_INFO "Horizontal Scaling value = %d", reg_value); 397 reg_value = 403 viafb_load_reg(reg_value, 417 reg_value = 424 viafb_load_reg(reg_value, [all...] |
/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | mmsch_v2_0.h | 257 uint32_t reg_value; member in struct:mmsch_v2_0_cmd_direct_write 278 uint32_t reg_value; member in struct:mmsch_v2_0_cmd_indirect_write 287 direct_wt->reg_value = value;
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H A D | mmhub_v1_7.c | 1249 uint32_t reg_value; local 1255 reg_value = 1257 if (reg_value) 1259 reg_value, &sec_count, &ded_count); 1289 uint32_t reg_value; local 1295 reg_value = 1297 if (REG_GET_FIELD(reg_value, MMEA0_ERR_STATUS, SDP_RDRSP_STATUS) || 1298 REG_GET_FIELD(reg_value, MMEA0_ERR_STATUS, SDP_WRRSP_STATUS) || 1299 REG_GET_FIELD(reg_value, MMEA0_ERR_STATUS, SDP_RDRSP_DATAPARITY_ERROR)) { 1301 i, reg_value); 1309 uint32_t reg_value; local 1320 reg_value); local [all...] |
H A D | gfx_v9_4.c | 872 uint32_t reg_value; local 887 reg_value = RREG32(SOC15_REG_ENTRY_OFFSET( 889 if (reg_value) 892 j, k, reg_value, &sec_count, 980 uint32_t reg_value; local 991 reg_value = RREG32(SOC15_REG_ENTRY_OFFSET( 993 if (REG_GET_FIELD(reg_value, GCEA_ERR_STATUS, SDP_RDRSP_STATUS) || 994 REG_GET_FIELD(reg_value, GCEA_ERR_STATUS, SDP_WRRSP_STATUS) || 995 REG_GET_FIELD(reg_value, GCEA_ERR_STATUS, SDP_RDRSP_DATAPARITY_ERROR)) { 1000 j, reg_value); [all...] |
/linux-master/drivers/tty/serial/8250/ |
H A D | 8250_men_mcb.c | 88 int reg_value; local 103 reg_value = MEN_READ_REGISTER(mem); 110 *uarts_available = reg_value >> 4;
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/linux-master/drivers/iio/imu/bmi323/ |
H A D | bmi323_core.c | 621 unsigned int reg_value, raw; local 625 ret = bmi323_read_ext_reg(data, BMI323_TAP2_REG, ®_value); 630 raw = FIELD_GET(BMI323_TAP2_MAX_DUR_MSK, reg_value); 677 unsigned int reg_value, raw; local 681 ret = bmi323_read_ext_reg(data, BMI323_TAP1_REG, ®_value); 686 raw = FIELD_GET(BMI323_TAP1_TIMOUT_MSK, reg_value); 936 unsigned int raw, reg_value; local 946 ®_value); 950 raw = FIELD_GET(BMI323_TAP2_THRES_MSK, reg_value); 956 ®_value); [all...] |
/linux-master/drivers/regulator/ |
H A D | mt6331-regulator.c | 447 u32 reg_value; local 454 if (regmap_read(mt6331->regmap, MT6331_HWCID, ®_value) < 0) { 458 reg_value &= GENMASK(7, 0); 460 dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value); 469 if (reg_value == 0x10) {
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H A D | mt6332-regulator.c | 362 u32 reg_value; local 369 if (regmap_read(mt6332->regmap, MT6332_HWCID, ®_value) < 0) { 373 reg_value &= GENMASK(7, 0); 375 dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value); 384 if (reg_value == 0x10) {
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H A D | mc13892-regulator.c | 442 u32 reg_value; local 447 reg_value = selector; 467 reg_value -= MC13892_SWxHI_SEL_OFFSET; 468 reg_value |= MC13892_SWITCHERS0_SWxHI; 470 reg_value &= ~MC13892_SWITCHERS0_SWxHI; 476 mask, reg_value);
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/linux-master/drivers/mmc/host/ |
H A D | dw_mmc-k3.c | 223 u32 reg_value; local 252 reg_value = FIELD_PREP(UHS_REG_EXT_SAMPLE_PHASE_MASK, smpl_phase) | 255 mci_writel(host, UHS_REG_EXT, reg_value); 259 reg_value = FIELD_PREP(GPIO_CLK_DIV_MASK, GENCLK_DIV) | 261 mci_writel(host, GPIO, (unsigned int)reg_value | GPIO_CLK_ENABLE);
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/linux-master/drivers/net/ethernet/hisilicon/hns/ |
H A D | hns_dsaf_ppe.c | 34 int reg_value; local 37 reg_value = dsaf_read_dev(ppe_cb, 40 dsaf_set_field(reg_value, PPEV2_CFG_RSS_TBL_4N0_M, 43 dsaf_set_field(reg_value, PPEV2_CFG_RSS_TBL_4N1_M, 46 dsaf_set_field(reg_value, PPEV2_CFG_RSS_TBL_4N2_M, 49 dsaf_set_field(reg_value, PPEV2_CFG_RSS_TBL_4N3_M, 53 ppe_cb, PPEV2_INDRECTION_TBL_REG + i * 0x4, reg_value);
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/linux-master/drivers/staging/vt6655/ |
H A D | card.c | 60 u32 reg_value; local 62 reg_value = ioread32(iobase + MAC_REG_ENCFG); 63 reg_value = reg_value & ~ENCFG_BBTYPE_MASK; 64 reg_value = reg_value | mask; 65 iowrite32(reg_value, iobase + MAC_REG_ENCFG);
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/linux-master/drivers/hwmon/ |
H A D | aspeed-pwm-tacho.c | 394 u32 reg_value = ((div_high << type_params[type].h_value) | local 399 type_params[type].clk_ctrl_mask, reg_value); 413 u32 reg_value = (type & 0x1) << pwm_port_params[pwm_port].type_part1; local 415 reg_value |= (type & 0x2) << pwm_port_params[pwm_port].type_part2; 418 pwm_port_params[pwm_port].type_mask, reg_value); 425 u32 reg_value = (rising << local 427 reg_value |= (falling << 432 reg_value); 446 u32 reg_value = ((mode << TYPE_CTRL_FAN_MODE) | local 451 TYPE_CTRL_FAN_MASK, reg_value); [all...] |
/linux-master/drivers/platform/x86/intel/int1092/ |
H A D | intel_sar.c | 36 * context->reg_value will never exceed MAX_REGULATORY 41 &context->config_data[context->reg_value]; 172 return sysfs_emit(buf, "%d\n", context->reg_value); 189 context->reg_value = value;
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/linux-master/arch/mips/pci/ |
H A D | pci-mt7620.c | 111 unsigned long reg_value = 0x0, retry = 0; local 114 reg_value = pcie_r32(PCIEPHY0_CFG); 116 if (reg_value & BUSY)
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/linux-master/drivers/soc/sunxi/ |
H A D | sunxi_sram.c | 169 unsigned int *reg_value) 204 if (reg_value) 205 *reg_value = func->reg_val; 168 sunxi_sram_of_parse(struct device_node *node, unsigned int *reg_value) argument
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