/freebsd-11-stable/contrib/wpa/src/wps/ |
H A D | wps_upnp_ap.c | 22 struct wps_registrar *reg = timeout_ctx; local 25 wps_registrar_selected_registrar_changed(reg, 0); 29 int upnp_er_set_selected_registrar(struct wps_registrar *reg, argument 41 s->reg = reg; 42 eloop_cancel_timeout(upnp_er_set_selected_timeout, s, reg); 67 upnp_er_set_selected_timeout, s, reg); 70 wps_registrar_selected_registrar_changed(reg, 0); 76 void upnp_er_remove_notification(struct wps_registrar *reg, argument 80 eloop_cancel_timeout(upnp_er_set_selected_timeout, s, reg); [all...] |
/freebsd-11-stable/sys/dev/vx/ |
H A D | if_vxvar.h | 60 #define CSR_WRITE_4(sc, reg, val) \ 61 bus_space_write_4(sc->vx_bst, sc->vx_bsh, reg, val) 62 #define CSR_WRITE_2(sc, reg, val) \ 63 bus_space_write_2(sc->vx_bst, sc->vx_bsh, reg, val) 64 #define CSR_WRITE_1(sc, reg, val) \ 65 bus_space_write_1(sc->vx_bst, sc->vx_bsh, reg, val) 67 #define CSR_READ_4(sc, reg) \ 68 bus_space_read_4(sc->vx_bst, sc->vx_bsh, reg) 69 #define CSR_READ_2(sc, reg) \ 70 bus_space_read_2(sc->vx_bst, sc->vx_bsh, reg) [all...] |
/freebsd-11-stable/sys/dev/ixgbe/ |
H A D | ixgbe_osdep.c | 38 ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg) argument 40 return pci_read_config(((struct adapter *)hw->back)->dev, reg, 2); 44 ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value) argument 46 pci_write_config(((struct adapter *)hw->back)->dev, reg, value, 2); 50 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg) argument 53 ((struct adapter *)hw->back)->osdep.mem_bus_space_handle, reg); 57 ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val) argument 61 reg, val); 65 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset) argument 69 reg 73 ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val) argument [all...] |
/freebsd-11-stable/sys/arm/nvidia/tegra124/ |
H A D | tegra124_clk_pll.c | 416 uint32_t reg; local 419 RD4(sc, sc->base_reg, ®); 421 reg &= ~PLL_BASE_BYPASS; 422 reg |= PLL_BASE_ENABLE; 423 WR4(sc, sc->base_reg, reg); 430 uint32_t reg; local 432 RD4(sc, sc->base_reg, ®); 434 reg |= PLL_BASE_BYPASS; 435 reg &= ~PLL_BASE_ENABLE; 436 WR4(sc, sc->base_reg, reg); 458 reg_to_pdiv(struct pll_sc *sc, uint32_t reg) argument 519 uint32_t reg; local 560 uint32_t reg; local 698 uint32_t reg; local 880 uint32_t reg; local 995 uint32_t reg; local 1021 uint32_t reg, misc_reg; local 1078 uint32_t reg; local [all...] |
/freebsd-11-stable/cddl/contrib/opensolaris/lib/libdtrace/common/ |
H A D | dt_regset.c | 79 int reg; local 81 for (reg = 0; reg < drp->dr_size; reg++) { 82 if (BT_TEST(drp->dr_bitmap, reg) != 0) { 83 dt_dprintf("%%r%d was left allocated\n", reg); 111 int reg; local 115 reg = (int)((wx << BT_ULSHIFT) | bx); 116 BT_SET(drp->dr_bitmap, reg); 117 return (reg); 128 dt_regset_free(dt_regset_t *drp, int reg) argument [all...] |
/freebsd-11-stable/sys/powerpc/include/ |
H A D | reg.h | 1 /* $NetBSD: reg.h,v 1.4 2000/06/04 09:30:44 tsubai Exp $ */ 12 struct reg { struct 68 int fill_regs(struct thread *, struct reg *); 69 int set_regs(struct thread *, struct reg *); 82 #define fill_fpregs32(td, reg) fill_fpregs(td,(struct fpreg *)reg) 83 #define set_fpregs32(td, reg) set_fpregs(td,(struct fpreg *)reg) 84 #define fill_dbregs32(td, reg) fill_dbregs(td,(struct dbreg *)reg) [all...] |
/freebsd-11-stable/sys/mips/cavium/ |
H A D | octeon_ds1337.c | 99 uint8_t reg[8]; local 105 memset(®, 0, sizeof(reg)); 111 reg[0] = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0); 113 reg[i] = cvmx_twsi_read8_cur_addr(CVMX_RTC_DS1337_ADDR); 116 if ((sec & 0xf) == (reg[0] & 0xf)) 120 ct.sec = bcd2bin(reg[0] & 0x7f); 121 ct.min = bcd2bin(reg[1] & 0x7f); 122 ct.hour = bcd2bin(reg[2] & 0x3f); 123 if ((reg[ 159 uint8_t reg[8]; local [all...] |
/freebsd-11-stable/sys/contrib/octeon-sdk/ |
H A D | cvmx-cn3010-evb-hs5.c | 108 uint8_t reg[8]; local 113 memset(®, 0, sizeof(reg)); 119 reg[0] = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0); 121 reg[i] = cvmx_twsi_read8_cur_addr(CVMX_RTC_DS1337_ADDR); 124 if ((sec & 0xf) == (reg[0] & 0xf)) 128 tms.tm_sec = bcd2bin(reg[0] & 0x7f); 129 tms.tm_min = bcd2bin(reg[1] & 0x7f); 130 tms.tm_hour = bcd2bin(reg[2] & 0x3f); 131 if ((reg[ 157 uint8_t reg[8]; local [all...] |
/freebsd-11-stable/sys/dev/bhnd/cores/chipc/ |
H A D | chipc_spi.h | 82 #define SPI_WRITE(sc, reg, val) bus_write_4(sc->sc_res, (reg), (val)); 84 #define SPI_READ(sc, reg) bus_read_4(sc->sc_res, (reg)) 86 #define SPI_SET_BITS(sc, reg, bits) \ 87 SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits)) 89 #define SPI_CLEAR_BITS(sc, reg, bits) \ 90 SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) [all...] |
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
H A D | RegisterInfoPOSIX_arm64.cpp | 20 #define GPR_OFFSET_NAME(reg) \ 21 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::GPR, reg)) 24 #define FPU_OFFSET_NAME(reg) \ 25 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::FPU, reg) + \ 28 #define EXC_OFFSET_NAME(reg) \ 29 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::EXC, reg) + \ 32 #define DBG_OFFSET_NAME(reg) \ 33 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::DBG, reg) + \ 38 #define DEFINE_DBG(reg, i) \ 39 #reg, NUL [all...] |
/freebsd-11-stable/sys/arm/mv/armadaxp/ |
H A D | armadaxp_mp.c | 69 read_cpu_clkdiv(uint32_t reg) argument 72 return (bus_space_read_4(fdtbus_bs_tag, MV_AXP_CPU_DIVCLK_BASE, reg)); 76 write_cpu_clkdiv(uint32_t reg, uint32_t val) argument 79 bus_space_write_4(fdtbus_bs_tag, MV_AXP_CPU_DIVCLK_BASE, reg, val); 97 uint32_t reg, *src, *dst, cpu_num, div_val, cputype; local 124 reg = read_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL1); 125 reg &= CPU_DIVCLK_MASK(cpu_num); 126 reg |= div_val << (cpu_num * 8); 127 write_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL1, reg); 134 reg [all...] |
H A D | armadaxp.c | 192 read_coher_fabric(uint32_t reg) argument 195 return (bus_space_read_4(fdtbus_bs_tag, MV_COHERENCY_FABRIC_BASE, reg)); 199 write_coher_fabric(uint32_t reg, uint32_t val) argument 202 bus_space_write_4(fdtbus_bs_tag, MV_COHERENCY_FABRIC_BASE, reg, val); 236 read_l2_cache(uint32_t reg) argument 239 return (bus_space_read_4(fdtbus_bs_tag, ARMADAXP_L2_BASE, reg)); 243 write_l2_cache(uint32_t reg, uint32_t val) argument 246 bus_space_write_4(fdtbus_bs_tag, ARMADAXP_L2_BASE, reg, val); 258 u_int32_t reg; local 261 reg [all...] |
/freebsd-11-stable/sys/arm64/arm64/ |
H A D | debug_monitor.c | 87 #define DBG_WB_READ(reg, num, val) do { \ 88 __asm __volatile("mrs %0, dbg" reg #num "_el1" : "=r" (val)); \ 91 #define DBG_WB_WRITE(reg, num, val) do { \ 92 __asm __volatile("msr dbg" reg #num "_el1, %0" :: "r" (val)); \ 95 #define READ_WB_REG_CASE(reg, num, offset, val) \ 97 DBG_WB_READ(reg, num, val); \ 100 #define WRITE_WB_REG_CASE(reg, num, offset, val) \ 102 DBG_WB_WRITE(reg, num, val); \ 105 #define SWITCH_CASES_READ_WB_REG(reg, offset, val) \ 106 READ_WB_REG_CASE(reg, 142 dbg_wb_read_reg(int reg, int n) argument 159 dbg_wb_write_reg(int reg, int n, uint64_t val) argument 275 u_int max, reg, i; local [all...] |
/freebsd-11-stable/lib/libc/sparc64/sys/ |
H A D | __sparc_utrap_emul.c | 42 u_long reg, res; local 60 reg = __emul_f3_op2(uf, insn); 62 res += (reg >> i) & 1; 97 __emul_fetch_reg(struct utrapframe *uf, int reg) argument 101 if (reg == IREG_G0) 103 else if (reg < IREG_O0) /* global */ 104 return (uf->uf_global[reg]); 105 else if (reg < IREG_L0) /* out */ 106 return (uf->uf_out[reg - IREG_O0]); 113 return (frm->fr_local[reg 118 __emul_store_reg(struct utrapframe *uf, int reg, u_long val) argument [all...] |
/freebsd-11-stable/sys/arm/xscale/i8134x/ |
H A D | i81342_mcu.c | 44 uint32_t reg; local 47 reg = bus_space_read_4(bt, bh, SMC_SDBR); 48 *start = (reg & SMC_SDBR_BASEADDR_MASK); 49 reg = bus_space_read_4(bt, bh, SMC_SBSR); 50 if (reg & SMC_SBSR_BANK_NB) 55 *size = (reg & SMC_SBSR_BANK_SZ_MASK) * bank_nb;
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/freebsd-11-stable/sys/dev/isci/scil/ |
H A D | scic_sds_port_registers.h | 72 #define scu_port_task_scheduler_read(port, reg) \ 75 (port)->port_task_scheduler_registers->reg \ 82 #define scu_port_task_scheduler_write(port, reg, value) \ 85 (port)->port_task_scheduler_registers->reg, \ 89 #define scu_port_viit_register_write(port, reg, value) \ 92 (port)->viit_registers->reg, \
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/freebsd-11-stable/lib/libc/arm/sys/ |
H A D | __vdso_gettc.c | 45 uint64_t reg; local 47 __asm __volatile("mrrc\tp15, 1, %Q0, %R0, c14" : "=r" (reg)); 48 return (reg); 54 uint64_t reg; local 56 __asm __volatile("mrrc\tp15, 0, %Q0, %R0, c14" : "=r" (reg)); 57 return (reg);
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/freebsd-11-stable/lib/libc/aarch64/sys/ |
H A D | __vdso_gettc.c | 43 uint64_t reg; local 45 __asm __volatile("mrs %0, cntvct_el0" : "=r" (reg)); 46 return (reg); 52 uint64_t reg; local 54 __asm __volatile("mrs %0, cntpct_el0" : "=r" (reg)); 55 return (reg);
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/freebsd-11-stable/sys/arm64/include/ |
H A D | reg.h | 36 struct reg { struct 58 int fill_regs(struct thread *, struct reg *); 59 int set_regs(struct thread *, struct reg *);
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/freebsd-11-stable/usr.sbin/ndiscvt/ |
H A D | inf.c | 71 const struct reg *, int); 566 struct reg *reg; local 572 TAILQ_FOREACH(reg, &rh, link) { 579 if (reg->section == sec) { 580 if (reg->subkey == NULL) { 581 fprintf(ofp, "\n\t{ \"%s\",", reg->key); 582 fprintf(ofp,"\n\t\"%s \",", reg->key); 584 reg->value == NULL ? "" : 585 stringcvt(reg 600 struct reg *reg; local 618 struct reg *reg; local 640 struct reg *reg; local 660 struct reg *reg; local 680 struct reg *reg; local 697 struct reg *reg; local 872 struct reg *reg; local [all...] |
/freebsd-11-stable/gnu/usr.bin/gdb/gdbserver/ |
H A D | reg-amd64.c | 23 /* This file was created with the aid of ``regdat.sh'' and ``../../../../contrib/gdb/gdb/regformats/reg-x86-64.dat''. */ 31 struct reg regs_x86_64[] = {
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H A D | reg-arm.c | 23 /* This file was created with the aid of ``regdat.sh'' and ``reg-arm.dat''. */ 31 struct reg regs_arm[] = {
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H A D | reg-i386.c | 3 /* This file was created with the aid of ``regdat.sh'' and ``../../../../contrib/gdb/gdb/regformats/reg-i386.dat''. */ 11 struct reg regs_i386[] = {
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H A D | reg-powerpc.c | 23 /* This file was created with the aid of ``regdat.sh'' and ``../../../../contrib/gdb/gdb/regformats/reg-ppc.dat''. */ 31 struct reg regs_ppc[] = {
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/freebsd-11-stable/sys/mips/atheros/ |
H A D | pcf2123reg.h | 63 #define PCF2123_READ(reg) (PCF2123_CMD_READ | (1 << 4) | (reg)) 64 #define PCF2123_WRITE(reg) (PCF2123_CMD_WRITE | (1 << 4) | (reg))
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